Method of manufacturing semiconductor device having multiple gate oxide films
View Patent ↗A method of manufacturing a semiconductor device includes forming a first insulating film having a first thickness in a first region on a semiconductor substrate, forming a first gate electrode on the first insulating film, and forming a second insulating film having a second thickness different from the first thickness on the semiconductor substrate and the first gate electrode. Then, the method includes forming a conductive film on the second oxide film and forming a first resist pattern and a second resist pattern respectively on the conductive film in the first region and on the conductive film of a second region different from the first region. Then, the method includes removing the conductive film by using the first resist pattern as a mask to form a second gate electrode covering the first gate electrode via the second insulating film and removing the conductive film by using the second resist pattern as a mask to form a third gate electrode on the second insulating film of the second region.
1. A method of manufacturing a semiconductor device, comprising:
forming a first insulating film having a first thickness in a first region on a semiconductor substrate;
forming a first gate electrode on said first insulating film;
forming a second insulating film having a second thickness different from said first thickness on said semiconductor substrate and said first gate electrode;
forming a conductive film on said second insulating film;
forming a first resist pattern and a second resist pattern respectively on said conductive film in said first region excluding a central part of said first gate electrode and on said conductive film of a second region different from said first region;
removing said conductive film by using the first resist pattern as a mask to form a second gate electrode covering said first gate electrode via said second insulating film; and
removing said conductive film by using the second resist pattern as a mask to form a third gate electrode on said second insulating film of said second region.
2. The method as claimed in claim 1 , wherein said first thickness is larger than said second thickness.
3. The method as claimed in claim 2 , wherein said first insulating film is an oxide film.
4. The method as claimed in claim 3 , wherein said second insulating film is an oxide film.
5. The method as claimed in claim 4 , wherein said conductive film is a polysilicon film.
6. The method as claimed in claim 1 wherein said first resist pattern is formed to have a width larger than a width of said first gate electrode.
7. The method as claimed in claim 6 , wherein said first resist pattern is formed to have an opening which is located over said first gate electrode and said conductive film exposed by said opening is removed.
8. A method of forming a semiconductor device, comprising:
forming an element separation region on a semiconductor substrate to define a first region and a second region on said semiconductor substrate;
selectively forming a first oxide film on said first region of said semiconductor substrate by a selective oxidation process and a first gate electrode on said first oxide film;
introducing impurities in said first region;
forming a second oxide film on said semiconductor substrate and surfaces of said gate electrode of said first region and on said semiconductor substrate of said second region;
forming a conductive film on said second oxide film of said first and second regions;
selectively removing said conductive film to form a second gate electrode on said second region and form a cover film to cover said first electrode excluding a central part thereof via said second oxide film;
introducing impurities in said second region; and
removing said second oxide film to form a gate oxide film for said second gate electrode.
9. The method as claimed in claim 1 , wherein the center part of said first gate electrode is a penetration part where the contact part of said first gate electrode is formed.
10. The method as claimed in claim 8 , wherein the center part of said first gate electrode is a penetration part where the contact part of said first gate electrode is formed.