Digital watermark key generation
The present invention relates to message encoding. In a first implementation, a message is provided. The message is transformed by a secret key. The secret key is generated by providing a plural-bit seed. The seed is randomized and then error correction encoded. We prefer tail-biting convolutional encoding for our error correction encoding. The encoded seed forms a secure key, which is used to transform the message prior to embedding.
1. A method of generating a secure key for use with machine-readable indicia, said method comprising:
obtaining a unique identifier representing an entity or client;
altering the unique identifier in a random or pseudo-random manner;
using a programmed electronic processor for error correction encoding the altered unique identifier; and
using a programmed electronic processor for transforming a plural-bit message with the error correction encoded altered unique identifier to produce a secure key for use with message embedding.
2. The method of claim 1 wherein the machine-readable indicia comprises steganographic encoding.
3. The method of claim 1 wherein the error correction encoding comprises convolution encoding.
4. Logic gates formed in a silicon structure to perform the method recited in claim 1 .
5. A programmed computing device comprising memory device and instructions for causing said computing device to perform the method of claim 1 .
6. An apparatus comprising:
electronic memory for buffering a unique identifier representing an entity or client;
a multi-purpose electronic processor programmed for:
altering the unique identifier in a random or pseudo-random manner;
error correction encoding the altered unique identifier; and
transforming a plural-bit message with the error correction encoded altered unique identifier to produce a secure key for use with message embedding for machine-readable indicia.
7. The apparatus of claim 6 in which the machine-readable indicia comprises steganographic encoding.
8. The apparatus of claim 6 in which the error correction encoding comprises convolution encoding.
9. The apparatus of claim 6 in which the multi-purpose electronic processor is operating to perform at least one of the functions recited therein.
10. The apparatus of claim 7 in which the multi-purpose electronic processor is operating to perform at least one of the functions recited therein.
11. The apparatus of claim 8 in which the multi-purpose electronic processor is operating to perform at least one of the functions recited therein.