Method of manufacturing thin film capacitor

1. A method of manufacturing a thin film capacitor, comprising:

forming a first electrode layer having protrusions and depressions on its surface, on a lower insulating layer on a semiconductor substrate;

forming a sacrificial layer on the first electrode layer with a material that is reflowable when heated;

reflowing the sacrificial layer by heat treatment;

etching the reflowed sacrificial layer and first electrode layer so that the protrusions of the first electrode layer are curved; and

sequentially forming a dielectric layer and a second electrode layer on the first electrode layer.

2. The method of claim 1 , wherein

the sacrificial layer comprises a photoresist, and

the heat treatment comprises heating at a temperature of 150-300° C.

3. The method of claim 1 , wherein

the etching is performed such that the sacrificial layer and the first electrode layer are etched at about the same etch rate.

4. The method of claim 1 , wherein

the etching comprises plasma etching at a pressure of 8-13 mTorr, a source power of 900-1200 W, a bias power of 140-200 W, a flow rate of Cl 2 gas of 60-90sccm, a flow rate of BCl 3 gas of 40-70 sccm, a flow rate of Ar gas of 30-50 sccm, and a flow rate of CHF 3 gas of 2-5 sccm.

5. The method of claim 3 wherein

the etching comprises plasma etching at a pressure of 8-13 mTorr, a source power of 900-1200 W, a bias power of 140-200 W, a flow rate of Cl 2 gas of 60-90 sccm, a flow rate of BCl 3 gas of 40-70 sccm, a flow rate of Ar gas of 30-50 sccm, and a flow rate of CHF 3 gas of 2-5 sccm.

6. The method of claim 1 , wherein forming the first electrode layer comprises:

forming the first electrode layer on the lower insulating layer such that the first electrode layer has a thickness; and

selectively etching portions of the first electrode to form protrusions and depressions thereon to a depth less than the thickness of the first electrode layer.

7. The method of claim 1 , wherein forming the first electrode layer comprises:

sequentially forming a lower first electrode layer and an upper first electrode layer on the semiconductor substrate; and

selectively etching portions of the upper first electrode layer until portions of the lower first electrode layer are exposed, such that the non-etched portions of the upper first electrode layer protrude from unexposed areas of the lower first electrode layer.

8. The method of claim 7 , further comprising:

forming a liner metal layer on the lower first electrode layer and the lower insulating layer after the lower first electrode layer is formed, and

forming the upper first electrode layer on the liner metal layer.

9. The method of claim 1 , wherein

the first electrode layer comprises a material selected from the group consisting of Al, Cu, W, Ti, and TiN.

10. The method of claim 1 , wherein

forming the dielectric layer comprises conformally depositing the dielectric layer, and the dielectric layer comprises a material selected from the group consisting of TiO 2 , Al 2 O 3 ,and SiN.

11. The method of claim 1 , wherein

forming the second electrode layer comprises conformally depositing the second electrode layer, and the second electrode layer comprises a material selected from the group consisting of Ru, Pt, and TiN, and is formed to show the surface shape of.

12. The method of claim 1 , wherein

the etching comprises reducing a chamber pressure, applying a source power and a bias power to a plasma etching apparatus, and plasma etching the sacrificial layer and the first electrode layer using a chlorine source gas, a boron source gas, and a fluorocarbon source gas.

13. The method of claim 12 , wherein

the etching further comprises plasma etching the sacrificial layer and the first electrode layer using an inert gas.

14. The method of claim 12 , wherein the chlorine source gas comprises Cl 2 , the boron source gas comprises BCl 3 , and the fluorocarbon source gas comprises CH x F y , where y ≧1 and x+y=4.

15. A method of manufacturing a thin film capacitor, comprising:

forming a first electrode layer having protrusions and depressions on its surface, on a lower insulating layer on a semiconductor substrate;

forming a reflowable sacrificial layer on the first electrode layer;

reflowing the sacrificial layer;

removing the reflowed sacrificial layer and portions of the first electrode layer to curve the protrusions on the surface of the first electrode layer; and

sequentially forming a dielectric layer and a second electrode layer on the first electrode layer.