IP Library Granted Patent US 7,253,478
Granted Patent B2
US 7,253,478 · App. 11/145,939 · Granted Aug 7, 2007

Semiconductor device

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,253,478
App. No.
11/145,939
Granted
Aug 7, 2007
Kind
B2
Abstract

The semiconductor device comprises: a semiconductor substrate (N + substrate 110 ) containing a first conductivity type impurity implanted therein; a second conductivity type impurity-implanted layer (P + implanted layer 114 ) at relatively high concentration, formed on the semiconductor substrate (N + substrate 110 ); a second conductivity type impurity epitaxial layer (P − epitaxial layer 111 ) at relatively low concentration, formed on the second conductivity type impurity-implanted layer (P + implanted layer 114 ); and a field effect transistor 100 (N-channel type lateral MOSFET 100 ) composed of a pair of impurity diffusion regions (N + source diffusion layer 115 and N − drain layer 116 ) provided in the second conductivity type impurity epitaxial layer (P − epitaxial layer 111 ) and a gate electrode 117 provided over a region sandwiched with the pair of impurity diffusion regions (N + source diffusion layer 115 and N − drain layer 116 ).

Claims (20)

1. A semiconductor device, comprising:

a semiconductor substrate containing a first conductivity type impurity implanted in said semiconductor substrate;

a second conductivity type impurity-implanted layer at a relatively high concentration, formed on said semiconductor substrate;

a second conductivity type impurity epitaxial layer at a relatively low concentration, formed on said second conductivity type impurity-implanted layer; and

a field effect transistor comprising:

a pair of impurity diffusion regions provided in said second conductivity type impurity epitaxial layer; and

a gate electrode provided over a region disposed between said pair of impurity diffusion regions; and

a second conductivity type impurity source buried layer that contacts with said semiconductor substrate and with said second conductivity type impurity-implanted layer.

2. The semiconductor device according to claim 1 , wherein said first conductivity type impurity includes As or Sb.

3. The semiconductor device according to claim 1 , wherein an insulating film is provided to cover an upper face and a side face of said gate electrode, and a polysilicon electrode is provided to contact with an upper face of said insulating film.

4. The semiconductor device according to claim 1 , wherein a source electrode is provided on an upper portion of said impurity diffusion region, another source electrode, which is different from said source electrode, is provided on a back surface of said semiconductor substrate, and said second conductivity type impurity source buried layer is coupled to said another source electrode.

5. The semiconductor device according to claim 4 , wherein said another source electrode is provided to cover an entire back surface of said semiconductor substrate.

6. The semiconductor device according to claim 4 , wherein a region implanted with a first conductivity type impurity is provided to contact with a lower surface of said source electrode, and said second conductivity type impurity source buried layer contacts with said source electrode.

7. The semiconductor device according to claim 1 , wherein a concentration of said second conductivity type impurity epitaxial layer is lower than a concentration of said second conductivity type impurity-implanted layer.

8. The semiconductor device according to claim 1 , wherein said first conductivity type impurity comprises boron or aluminum.

9. The semiconductor device according to claim 1 , wherein said semiconductor substrate comprises an N-type substrate.

10. The semiconductor device according to claim 1 , wherein said second conductivity type impurity-implanted layer comprises a P-type layer.

11. The semiconductor device according to claim 1 , wherein a diffusion coefficient of said first conductivity type impurity is smaller than a diffusion coefficient of a second conductivity type impurity implanted in said second conductivity type impurity implanted layer.

12. The semiconductor device according to claim 7 , wherein the concentration of said second conductivity type impurity-implanted layer is 1×10 −16 cm −3 or more.

13. The semiconductor device according to claim 7 , wherein a thickness of said second conductivity type impurity-implanted layer is 1 μm or more.

Assignments (3)
CHANGE OF NAME Recorded Nov 11, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025346/0868 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 14, 2006
From: NEC COMPOUND SEMICONDUCTOR DEVICES, LTD.
To: NEC ELECTRONICS CORPORATION
Reel/Frame 017765/0268 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 7, 2005
From: TSUBAKI, SHIGEKI
To: NEC COMPOUND SEMICONDUCTOR DEVICES, LTD.
Reel/Frame 016491/0208 →