IP Library Granted Patent US 7,387,926
Granted Patent B2
US 7,387,926 · App. 11/148,212 · Granted Jun 17, 2008

Method for manufacturing CMOS image sensor

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Quick Facts
Patent No.
US 7,387,926
App. No.
11/148,212
Granted
Jun 17, 2008
Kind
B2
Abstract

A method for manufacturing a CMOS image sensor is provided. The method includes forming a gate electrode on a semiconductor layer having defined regions of a photodiode region and a logic region, such that a gate oxide film is interposed between the semiconductor layer and the gate electrode; forming sidewall insulating films at both sides of the gate electrode, followed by forming a salicide-preventing film over an overall surface of the gate electrode and insulating films; removing the salicide-preventing film formed in the logic region; and removing a portion of the sidewall insulating films exposed by removing the salicide-preventing film, thereby exposing an upper side surface of the gate electrode.

Claims (13)

1. A method for manufacturing a CMOS image sensor, comprising:

preparing a semiconductor substrate having a photodiode region and a logic region;

forming a first gate electrode on the photodiode region and a second gate electrode on the logic region, such that a gate oxide film is interposed between the semiconductor layer and the first and second gate electrodes;

forming sidewall insulating films at both sides of the first and second gate electrodes;

forming a salicide-preventing film over an overall surface of the semiconductor substrate including the first and second gate electrodes and the sidewall insulating films;

removing a portion of the salicide-preventing film so as to cover the photodiode region and to expose the logic region and a portion of the sidewall insulating film of the first gate electrode; and

removing a portion of the sidewall insulating films exposed by removing the salicide-preventing film, thereby exposing an upper side surface of the first and second gate electrodes.

2. The method as set forth in claim 1 , further comprising:

forming a salicide film on the exposed first and second gate electrodes using the salicide-preventing film as a mask after exposing the upper side surface of the first and second gate electrodes.

3. The method as set forth in claim 1 , wherein the sidewall insulating film is formed of one of a single insulating film and a stacked film formation comprising first and second insulating films having different etching ratios.

4. The method as set forth in claim 3 , wherein the first insulating film is an oxide-based insulating film.

5. The method as set forth in claim 3 , wherein the second insulating film is a nitride insulating film.

6. The method as set forth in claim 3 , wherein the first insulating film has a thickness of 100˜300 Å.

Assignments (2)
CHANGE OF NAME Recorded Nov 30, 2017
From: DONGBU HITEK CO., LTD.
To: DB HITEK CO., LTD
Reel/Frame 044555/0913 →
MERGER AND CHANGE OF NAME Recorded Nov 29, 2017
From: DONGBU ELECTRONICS CO., LTD.; DONGBU HITEK CO., LTD.
To: DONGBU HITEK CO., LTD.
Reel/Frame 044533/0523 →