IP Library Granted Patent US 7,449,750
Granted Patent B2
US 7,449,750 · App. 11/151,357 · Granted Nov 11, 2008

Semiconductor protection device

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Quick Facts
Patent No.
US 7,449,750
App. No.
11/151,357
Granted
Nov 11, 2008
Kind
B2
Abstract

A semiconductor protection device for efficiently protecting internal circuits in semiconductor integrated circuits wherein an N-type diffusion layer is formed to enclose a P + doped diffusion layer. The breakdown voltage of the parasitic diode connected to the collector electrode is consequently set lower than the breakdown voltage of the diode connected to the emitter voltage due to the increase in the concentration of N-type impurities around the parasitic diode from the forming of the N-type diffusion layer. In other words, the diode breakdown voltage is determined by the high or low concentration of impurities around the applicable diode so that the higher concentration of impurities, the lower the breakdown voltage. The clamping of the parasitic diode connected between the high voltage potential supply and the low voltage potential supply is therefore boosted to make electrical current flow more easily in the reverse direction so that damage to internal circuits from static electricity applied to the power supply terminals can be prevented.

Claims (28)

1. A protection device to protect an internal circuit comprising:

a first power source line;

a second power source line;

a signal line coupled to said internal circuit;

a bipolar transistor having its current path between said second power source line and said signal line and its control node coupled to said first power source line;

a first parasitic diode coupled between said first power source line and said signal line and having a first breakdown voltage; and

a second parasitic diode coupled between said first and second power source line and having a second breakdown voltage lower than said first breakdown voltage;

wherein said first parasitic diode has a first diffusion region of a first conductivity type formed over a semiconductor well of a second conductivity type,

wherein said second parasitic diode has a second diffusion region of said first conductivity type formed over said semiconductor well and a third diffusion region of said second conductivity type formed between said second diffusion region and said semiconductor well,

wherein impurity concentration of said second diffusion region is larger than that of said semiconductor well.

2. The protection circuit as claimed in claim 1 , wherein said second parasitic diode is formed at a collector region of said bipolar transistor.

3. The protection device as claimed in claim 1 , wherein said second parasitic diode is formed′ at a guard ling region other than a collector region of said bipolar transistor.

4. A protection device to protect an internal circuit, comprising:

a first power source line;

a second power source line;

a signal line coupled to said internal circuit;

a semiconductor well of a first conductivity type;

a first diffusion region of said first conductivity type formed on said semiconductor well and coupled to said first power source line;

a second diffusion region of a second conductivity type formed on said semiconductor well and coupled to said signal line;

a third diffusion region of said second conductivity type formed on said semiconductor well and coupled to said second power source line; and

a fourth diffusion region of said first conductivity type formed between said third diffusion region and said semiconductor well to form a parasitic diode with said third and fourth diffusion regions

wherein an impurity concentration of said fourth diffusion region is larger than that of said semiconductor well.

5. The protection device as claimed in claim 4 , wherein said second, third and fourth diffusion regions are arranged to form a bipolar transistor.

6. The protection device as claimed in claim 4 , said protection device further including a fifth diffusion region of said second conductivity type formed on said semiconductor well;

wherein said second and fifth diffusion regions are arranged to form a bipolar transistor;

wherein said third and fourth diffusion regions are arranged apart from said second and fifth diffusion regions.

7. The protection device as claimed in claim 4 , wherein said first conductivity type is a N type and said second conductivity type is a P type.

8. The protection device as claimed in claim 4 , wherein said first conductivity type is a P type and said second conductivity type is a N type.

Assignments (2)
CHANGE OF NAME Recorded Nov 11, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025346/0868 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 14, 2005
From: TAKAHASHI, YUKIO
To: NEC ELECTRONICS CORPORATION
Reel/Frame 016695/0118 →