Method and apparatus for an ADC circuit with wider input signal swing
An analog-to-digital converter (ADC) system that converts an analog input signal into a digital output circuit uses a method of shaping a pseudo-random signal such that the ADC system can be used with input signals having wider swings. The ADC system also includes a quantizer having a comparator offset of less than =/−¼ least significant bit (LSB) in a stage calibrated for gain errors. A method of operating an ADC circuit includes measuring an amplitude and polarity of an input signal voltage and changing characteristics of a pseudo-random signal to ensure that a subsequent stage of the ADC circuit is not saturated. An implementation of the ADC circuit alters the pseudo-random signal based on the amplitude of the input signal such that when the input signal goes close to a positive rail, the pseudo-random signal alternates between a first range, and when the input signal goes close to a negative rail, the pseudo-random signal alternates between a second range.
1. A method of converting an analog input signal into a digital output signal using an analog-to-digital converter system, the analog-to-digital converter system having a first stage analog-to-digital converter and a second stage analog-to-digital converter, the method comprising:
measuring a characteristic of the analog input signal;
varying a characteristic of a digital test signal in response to the characteristic of the analog input signal; and
inserting the digital test signal into the analog-to-digital converter system;
wherein varying a characteristic of the digital test signal in response to the characteristic of the input signal includes:
confining an input swing of the digital test signal between zero and a negative test signal voltage when an amplitude of the analog input signal is above a positive reference voltage, and
confining the input swing of the digital test signal between zero and a positive test signal voltage when the amplitude of the analog input signal is below a negative reference voltage.
2. A method of claim 1 , wherein inserting the digital test signal into the analog-to-digital converter system includes inserting the digital test signal into the first stage analog-to-digital converter of the analog-to-digital converter system.
3. A method of claim 1 , wherein measuring a characteristic of the analog input signal includes measuring one of amplitude or polarity of the analog input signal.
4. A method of claim 1 , wherein varying a characteristic of the digital test signal in response to the characteristic of the analog input signal includes:
changing polarity of the digital test signal to a negative value when amplitude of the analog input signal is equal to or greater than the positive reference voltage; and
changing the polarity of the digital test signal to a positive value when the amplitude of the analog input signal is equal to or lesser than the negative reference voltage.
5. A method of claim 1 , wherein varying a characteristic of a digital test signal in response to the characteristic of the input signal further includes:
confining the input swing of the digital test signal between the negative test signal voltage and the positive test signal voltage when the amplitude of the analog input signal is above the negative reference voltage and below the positive reference voltage.
6. A method of claim 1 , further comprising:
generating a first stage digital output signal from the analog input signal;
determining a first stage residue signal as a combination of the first stage digital output signal and the analog input signal;
generating a second stage digital output signal from the first stage residue signal; and
digitally combining the first stage digital output signal and the second stage digital output signal in a manner so as to remove an effect of the digital test signal on the digital output signal.
7. A method of claim 6 , wherein digitally combining the first stage digital output signal and the second stage digital output signal includes digitally combining the first stage digital output signal and the second stage digital output signal using one of: (1) hardware; (2) software; or (3) firmware.
8. A method of claim 6 , wherein generating the first stage digital output signal from the analog input signal includes generating the first stage digital output signal from the analog input signal using one of: (1) a pipelined analog-to-digital converter circuit; (2) a cyclic analog-to-digital converter circuit; or (3) a sigma-delta analog-to-digital converter circuit.
9. A method of claim 6 , wherein generating the first stage digital output signal from the analog input signal includes generating the first stage digital output signal from the analog input signal using a pipelined analog-to-digital converter circuit of at least 1.5 bit order.
10. A method of claim 1 , wherein varying the characteristic of the digital test signal in response to the characteristic of the input signal includes varying the digital test signal from a two level digital test signal to a three level digital test signal.
11. A method of claim 1 , wherein measuring a characteristic of the analog input signal includes measuring a characteristic of the analog input signal using a quantizer located in the first stage analog-to-digital converter.
12. An analog-to-digital converter system for converting an analog input signal to a digital output signal, the system comprising:
a first stage analog-to-digital converter circuit adapted to receive the analog input signal, to generate a digital representation of the analog input signal, and to measure a characteristic of the analog input signal;
a digital signal modulator adapted to modify a characteristic of a digital test signal based on the characteristic of the analog input signal; and
a first combiner circuit adapted to insert the modified digital test signal into the digital representation of the analog input signal;
wherein the digital signal modulator is adapted to modify the characteristic of the digital test signal in a manner so that when an amplitude of the analog input signal is equal to or higher than a positive reference voltage, the polarity of the digital test signal is negative, and when the amplitude of the analog input signal is equal to or lower than a negative reference voltage, the polarity of the digital test signal is positive.
13. A system of claim 12 , wherein the first stage analog-to-digital converter circuit is a pipelined analog-to-digital converter circuit of at least 1.5 bit order.
14. A system of claim 13 , wherein the first stage analog-to-digital converter circuit is further adapted to measure the characteristic of the analog input signal using a quantizer.
15. A system of claim 12 , wherein:
the first stage analog-to-digital converter circuit is further adapted to measure one of the amplitude of the analog input signal and a polarity of the analog input signal; and
the digital signal modulator is further adapted to modify the characteristic of the digital test signal based on one of the amplitude of the analog input signal and a polarity of the analog input signal.
16. A system of claim 12 , wherein the first combiner circuit is adapted to insert the modified digital test signal into the digital representation of the analog input signal in the first stage analog-to-digital converter circuit.
17. A system of claim 12 , wherein the first stage analog-to-digital converter is further adapted to generate a first stage digital output signal, the system further comprising:
a second combiner circuit adapted to generate a residue signal as a combination of the first stage digital output signal and the analog input signal;
a second stage analog-to-digital converter adapted to generate a second stage digital output signal using the residue signal; and
a digital recombiner adapted to recombine the first stage digital output signal and the second stage digital output signal in a manner so as to remove an effect of the digital test signal on the digital output signal.
18. A system of claim 12 , wherein the digital recombiner is implemented using one of: (1) hardware; (2) software; or (3) firmware.
19. A system of claim 12 , wherein the first stage analog-to-digital converter is implemented using one of: (1) a pipelined analog-to-digital converter circuit; (2) a cyclic analog-to-digital converter circuit; or (3) a sigma-delta analog-to-digital converter circuit.