IP Library Patent Application 11157863
Patent Application
App. No. 11/157,863

Semiconductor device

Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US None
App. No.
11/157,863
Abstract

In a semiconductor device comprising a semiconductor chip, electrodes formed on the major surface of the semiconductor chip, and a wiring board for mounting the semiconductor chip, for example, wirings for electrically connecting the wirings of the wiring board to the electrodes are provided. As the wirings, those relaxing stress generated between the semiconductor chip and the wiring board are used.

Claims (61)

1 . A semiconductor device comprising:

electrode pads formed on the major surface of a semiconductor chip,

wirings connected to said electrode pads, and

electrodes connected to said wirings, wherein

said wirings relax stress generated in said semiconductor chip.

2 . A semiconductor device comprising:

a semiconductor chip,

electrodes formed on the major surface of said semiconductor chip,

a wiring board for mounting said semiconductor chip, and

redistribution wirings for electrically connecting wirings of said wiring board to said electrodes, wherein

said redistribution wirings relax stress generated between said semiconductor chip and said wiring board.

3 . The semiconductor device according to claim 2 , further comprising a stress-buffer film formed by burying said redistribution wirings, and disposed between said electrodes and said wiring board.

4 . The semiconductor device according to claim 2 , wherein each of said redistribution wirings has a mountain-shaped protruded portion, and a flat portion connected to said protruded portion in continuity in cross section,

each of said redistribution wiring is connected to said electrodes at said protruded portion, and

is connected to wirings of said wiring board at said flat portion.

5 . A semiconductor device comprising:

a semiconductor chip,

electrodes formed on the major surface of said semiconductor chip,

a wiring board for mounting said semiconductor chip, and electrically connected to said electrodes,

a heat-dissipating plate disposed facing the back surface of said semiconductor chip opposite to the major surface, and

a stress relaxation resin disposed between said heat-dissipating plate and the back surface of said semiconductor chip.

6 . The semiconductor device according to claim 5 , wherein said stress relaxation resin is a gelatinous heat-dissipating resin.

7 . The semiconductor device according to claim 5 , wherein said stress relaxation resin has an elasticity modulus of 1 MPa or lower.

8 . A semiconductor device comprising:

a semiconductor chip,

electrodes formed on the major surface of said semiconductor chip,

a wiring board for mounting said semiconductor chip, and

electrically connected to said electrodes, and

a heat-dissipating plate disposed facing the back surface of said semiconductor chip opposite to the major surface, wherein

said heat-dissipating plate is installed on said wiring board through a heat-dissipating-plate fixer having elasticity.

9 . A semiconductor device comprising:

a semiconductor chip,

electrodes formed on the major surface of said semiconductor chip, and

a wiring board for mounting said semiconductor chip, and

electrically connected to said electrodes, wherein said wiring board includes:

a core layer, and

two built-up layers disposed across said core layer; and

each of said core layer and built-up layers contains glass cloth.

10 . A semiconductor device comprising:

two semiconductor chips each having electrodes on the major surface,

a wiring board disposed between said two semiconductor chips for mounting said semiconductor chips on both surfaces, and

redistribution wirings for electrically connecting wirings of said wiring board to said electrodes, wherein

said redistribution wirings relax stress generated between said semiconductor chips and said wiring board.

11 . The semiconductor device according to claim 10 , wherein

one of said two semiconductor chips is a dummy chip, and

the other of said two semiconductor chips and said dummy chip have a substantially identical coefficient of linear thermal expansion.

12 . A semiconductor device comprising:

a wiring board,

a semiconductor chip mounted on said wiring board, and encapsulated with an encapsulating member,

a mother board for mounting said semiconductor chip with said wiring board, and

a heat sink disposed to face the surface of said semiconductor chip opposite to the surface facing said mother board, wherein

said heat sink is installed on said mother board through a heat-sink fixer having elasticity.

13 . A semiconductor device comprising:

two wiring boards,

two semiconductor chips mounted on said wiring boards, and encapsulated with encapsulating members, respectively, and

a mother board for mounting said semiconductor chips with wiring boards, wherein

said two semiconductor chips are mounted on the both side of said mother board across said mother board.

14 . A semiconductor device comprising:

a semiconductor chip, and

a wiring board for mounting said semiconductor chip, wherein

at least the side of said semiconductor chip is protected with an encapsulating resin.

Assignments (3)
MERGER Recorded Aug 25, 2010
From: RENESAS TECHNOLOGY CORP.
To: NEC ELECTRONICS CORPORATION
Reel/Frame 024879/0399 →
CHANGE OF NAME Recorded Aug 25, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 024879/0423 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 22, 2005
From: WAKIYAMA, SATORU; BABA, SHINJI
To: RENESAS TECHNOLOGY CORP.
Reel/Frame 016716/0637 →