METHOD FOR TRANSFORM-DOMAIN ROUNDING IN A DECODER AND VIDEO DECODER THEREOF

1 . A method for transform-domain rounding in a decoder, the method comprising:

performing transform-domain motion compensation on a block according to a motion vector to generate a motion-compensated block;

determining a transform-domain offset with reference to the motion vector;

adding the transform-domain offset to the motion-compensated block to obtain an addition result; and

outputting the addition result as a rounded reference block.

2 . The method of claim 1 , wherein determining the transform-domain offset with reference to the motion vector comprises looking up a pre-calculated transform-domain offset stored in a lookup table.

3 . The method of claim 2 , wherein a plurality of pre-calculated transform-domain offsets are stored in the lookup table, each transform-domain offset corresponding to a motion vector.

4 . The method of claim 2 , wherein the transform-domain offset is a transform-domain equivalent of an average pixel-domain offset as determined by:

determining a finite set of possible fractional values corresponding to division of a summation of pixel values by a divisor;

determining a set of possible rounded values of the set of possible fractional values according to a rounding rule;

determining a set of possible difference values, wherein each difference value is a corresponding possible fractional value subtracted from a corresponding possible rounded value; and

averaging the set of possible difference values to obtain the average pixel-domain offset.

5 . The method of claim 4 , wherein a plurality of pre-calculated transform-domain offsets are stored in the lookup table, each transform-domain offset corresponding to an average pixel-domain offset and a motion vector.

6 . A video decoder comprising:

a variable length decoder (VLD) having an input for receiving compressed video;

an inverse quantization (IQ) module having an input coupled to a first output of the VLD;

a first adder having a first input coupled to an output of the IQ module;

a frame buffer having an input coupled to an output of the first adder;

a transform-domain motion compensation module having a first input coupled to a second output of the VLD and a second input coupled to an output of the frame buffer;

a second adder having a first input coupled to an output of the transform-domain motion compensation module and having an output coupled to a second input of the first adder; and

an offset calculation module having an input coupled to the second output the VLD and having an output coupled to a second input of the second adder, the offset calculation module outputting a transform-domain offset with reference to a motion vector output by the VLD.

7 . The video decoder of claim 6 , wherein the offset calculation module comprises a lookup table relating motion vectors to transform-domain offsets.

8 . The video decoder of claim 7 , wherein each transform domain offset comprises a transform domain equivalent of a pre-calculated average of a set of possible difference values, wherein each difference value is a possible fractional value subtracted from a corresponding possible rounded value, wherein the possible fractional values are fractional values corresponding to division of a summation of pixel values by a divisor and the possible rounded values are possible fractional values rounded according to a rounding rule.

9 . The video decoder of claim 6 , further comprising a inverse discrete cosine transform (IDCT) module having an input coupled to the output of the first adder.