IP Library Granted Patent US 7,026,213
Granted Patent B1
US 7,026,213 · App. 11/166,484 · Granted Apr 11, 2006

Method of fabricating flash memory device

Assignee: Hynix Semiconductor Inc.
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,026,213
App. No.
11/166,484
Granted
Apr 11, 2006
Kind
B1
Abstract

The present invention relates to a method of fabricating a flash memory device. According to the present invention, an oxide film is deposited and etched to form trenches, the trenches are filled with a metal film, and the metal film undergoes CMP to form bit lines. In this case, an etch stop layer of the trench etch process, a CMP stop layer of a CMP process and a wet barrier on the sides of the trenches are formed using a thermally treated SiON film having an etch rate lower than that of a wet chemical. As such, since a thickness and width of bit lines can be made uniform, bit line resistance and capacitance can be maintained constantly.

Claims (19)

1. A method of fabricating a flash memory device, comprising the steps of:

(a) forming a first SiON film on a semiconductor substrate and thermally treating the first SiON film;

(b) forming an insulating film on the thermally treated first SiON film;

(c) forming a second SiON film on the insulating film and thermally treating the second SiON film;

(d) patterning the thermally treated second SiON film, the insulating film and the thermally treated first SiON film to form trenches;

(e) forming a third SiON film on the entire surface, thermally treating the third SiON film, and allowing the thermally treated third SiON film to remain on the sides of the trenches; and

(f) forming bit lines within the trenches.

2. The method as claimed in claim 1 , wherein the first SiON film is formed to a thickness from 150 Å to 300 Å.

3. The method as claimed in claim 1 , wherein a thermal treatment temperature of the step (a), (c) and (e) is from 500° to 850° C.

4. The method as claimed in claim 1 , wherein the thermal treatment process of the step (a), (c) and (e) is performed under an oxidization atmosphere and inert atmosphere.

5. The method as claimed in claim 1 , wherein the second SiON film is formed to a thickness from 200 Å to 500 Å.

6. The method as claimed in claim 1 , wherein the third SiON film is formed to a thickness from 30 Å to 100 Å.

7. The method as claimed in claim 1 , wherein the step (d) includes the steps of:

forming a hard mask film on the thermally treated second SiON film;

patterning the hard mask film and the thermally treated second SiON film by means of a photolithography process;

patterning the insulating film and the thermally treated first SiON film using the patterned hard mask film as a mask, forming trenches; and

removing the hard mask film.

8. The method as claimed in claim 7 , wherein the hard mask film is formed using a silicon nitride film.

9. The method as claimed in claim 7 , wherein when removing the hard mask film is performed using a phosphoric acid (H 3 PO 4 ).

Assignments (2)
CHANGE OF NAME Recorded Mar 9, 2014
From: HYNIX SEMICONDUCTOR, INC.
To: SK HYNIX INC
Reel/Frame 032421/0496 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 24, 2005
From: LEE, BYOUNG KI
To: HYNIX SEMICONDUCTOR INC.
Reel/Frame 016738/0467 →
Priority Claims (1)
KR 10-2005-0033704 · Apr 22, 2005 · national