IP Library Granted Patent US 7,292,102
Granted Patent B2
US 7,292,102 · App. 11/167,359 · Granted Nov 6, 2007

Gain control scheme independent of process, voltage and temperature

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Quick Facts
Patent No.
US 7,292,102
App. No.
11/167,359
Granted
Nov 6, 2007
Kind
B2
Abstract

An apparatus and method to use a shunt network across source terminals of cascode transistors that drive a differential current to control gain. When the gates of the cascode transistors and transistors of the shunt network are activated by a same bias voltage, the gain control is substantially independent of process, voltage and temperature variations.

Claims (24)

1. An apparatus comprising:

a driver having at least a pair of transistors disposed in a cascode arrangement having their gate terminals coupled together to receive a bias voltage and their source terminals coupled to receive differential driver current; and

a shunt network coupled across the source terminals of the pair of cascode transistors to operate as a current divider to divert a portion of the differential driver current away from the pair of cascode transistors, in which an amount of current diverted to the shunt network operates to control gain of the driver, and in which the shunt network includes at least one shunt transistor that has its gate terminal coupled to the bias voltage to activate the at least one shunt transistor, the coupling of the gates of the pair of cascode transistors and the gate of the at least one shunt transistor to the same bias voltage cancels circuit variations of the driver that are due to effects of process, voltage and temperature.

2. The apparatus of claim 1 wherein the shunt network includes a plurality of shunt transistors, in which the bias voltage is switched to a gate terminal of each respective shunt transistor when the respective shunt transistors are selected to activate and activation of particular transistor or transistors determine the amount of current diverted to allow different gain settings to be selected for the driver, and wherein coupling of the gates of the pair of cascode transistors and the gates of the shunt transistors together to the same bias voltage cancels circuit variations of the driver that are due to effects of process, voltage and temperature.

3. The apparatus of claim 2 , wherein the plurality of shunt transistors are programmable to select different gain settings for the driver.

4. An apparatus comprising:

a driver having at least a pair of transistors disposed in a cascode arrangement having their gate terminals coupled together to receive a bias voltage, their source terminals coupled to receive differential driver current and their drain terminals coupled to a load; and

a gain control network coupled across the source terminals of the pair of cascode transistors to operate as a current divider to divert a portion of the differential driver current away from the pair of cascode transistors, in which an amount of current diverted operates to control gain of the driver, the gain control network includes at least one shunt transistor that has its gate terminal coupled to the bias voltage to activate at least one shunt transistor, the coupling of the gates of the pair of cascode transistors and the gate of the at least one shunt transistor to the same bias voltage cancels circuit variations of the driver that are due to effects of process, voltage and temperature.

5. The apparatus of claim 4 wherein the at least one shunt transistor is actually a plurality of shunt transistors, in which a gate terminal of each respective shunt transistor is to be switched to the bias voltage to activate one or more of the respective shunt transistors and activation of particular transistor or transistors determine the amount of current diverted to allow different gain settings to be selected for the driver, the coupling of the gates of the pair of cascode transistors and the gates of the shunt transistors together to the same bias voltage cancels circuit variations of the driver that are due to effects of process, voltage and temperature.

6. The apparatus of claim 5 wherein the plurality of shunt transistors are programmable to select different gain settings for the driver.

7. The apparatus of claim 6 wherein the load coupled to the driver is a mixer.

8. The apparatus of claim 5 further comprising a pair of transconductance transistors coupled to generate the differential driver current to the driver.

9. The apparatus of claim 8 wherein the load coupled to the driver is a mixer.

10. The apparatus of claim 6 wherein maximum gain for the driver is obtained by having none of the shunt transistors active and gain is selectively reduced in steps by activating transistors in sequence.

11. The apparatus of claim 10 wherein the plurality of shunt transistors operate in a linear mode of operation to divert the differential current.

12. A method comprising:

driving a differential current into source terminals of a pair of transistors disposed in a cascode arrangement and in which a load is coupled to drain terminals of the pair of transistors;

providing a bias voltage to gate terminals of the pair of transistors;

activating a gain control network coupled across the source terminals of the pair of cascode transistors by selecting one or more transistors from a plurality of shunt transistors to be switched on for activation, in which a gain setting for driving the load is obtained by programmably selecting particular shunt transistor or transistors for activation;

providing the bias voltage to activate one or more of the shunt transistors and in which coupling of the gates of the pair of cascode transistors and gates of the shunt transistors that are activated to the same bias voltage cancels circuit variations that are due to effects of process, voltage and temperature; and

diverting a portion of the differential current away from the pair of cascode transistors into the gain control network, in which an amount of current diverted operates to control gain of a driver driving the load.

13. The method of claim 12 wherein driving the differential current into the source terminals of the pair of cascode transistors is achieved by a pair of transconductance transistors coupled to generate the differential current.

14. The method of claim 13 further comprising driving the load with a remaining portion of the differential current that is not diverted into the gain control network.

15. The method of claim 14 wherein driving the load includes driving a mixer.

Assignments (7)
CORRECTIVE ASSIGNMENT TO CORRECT THE ERROR IN RECORDING THE MERGER PREVIOUSLY RECORDED AT REEL: 047357 FRAME: 0302. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Mar 22, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048674/0834 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE OF MERGER PREVIOUSLY RECORDED ON REEL 047195 FRAME 0658. ASSIGNOR(S) HEREBY CONFIRMS THE THE EFFECTIVE DATE IS 09/05/2018. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047357/0302 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047195/0658 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 1, 2005
From: LEE, C. PAUL; BEHZAD, ARYA
To: BROADCOM CORPORATION
Reel/Frame 016333/0962 →