Small-sized data line driver capable of generating definite non-video gradation voltage

1. A data line driver for driving data lines of a display apparatus, comprising:

a data register adapted to latch video data in synchronization with latch signals of a shift register and to latch definite non-video gradation data in synchronization with a definite non-video gradation start signal from an external controller via a data bus;

a data latch circuit adapted to latch the video data and the definite non-video gradation data at different timings to generate digital output signals of said data latch circuit into analog signals;

a digital/analog converter adapted to convert the digital output signals of said data latch circuit into analog signals;

an output buffer adapted to apply the analog signals of said digital/analog converter to said data lines; and

a selector connected to said data bus and a definite non-video gradation data latch circuit, said selector adapted to select the video data or the definite non-video gradation data in accordance with a definite non-video gradation data enable signal.

2. A data line driver for driving data lines of a display apparatus, comprising:

a data register adapted to latch video data in synchronization with latch signals of a shift register and to latch definite non-video gradation data in synchronization with a definite non-video gradation start signal from an external controller via a data bus;

a data latch circuit adapted to latch the video data and the definite non-video gradation data at different timings to generate digital output signals of said data latch circuit into analog signals;

a digital/analog converter adapted to convert the digital output signals of said data latch circuit into analog signals;

an output buffer adapted to apply the analog signals of said digital/analog converter to said data lines;

a horizontal shift register adapted to shift a horizontal start signal in synchronization with a horizontal clock signal to sequentially generate said latch signals, said data register having a first data register section adapted to sequentially latch the video data in synchronization with said latch signals and a second data register section adapted to latch the definite non-video gradation data in synchronization with a definite non-video gradation start signal; and

a switch circuit connected to said data register, said switch circuit adapted to select the video data of said first data register section or the definite non-video gradation data in accordance with a definite non-video gradation data enable signal, said digital/analog converter being connected via said switch circuit to said data register.

3. The data line driver as set forth in claim 1 , further comprising:

a horizontal shift register adapted to shift a horizontal start signal in synchronization with a horizontal clock signal to sequentially generate said latch signals;

said definite non-video gradation data latch circuit adapted to latch the definite non-video gradation data via said data bus in synchronization with a definite non-video gradation data start signal, and

said data register latching the video data or the definite non-video gradation data of said selector in synchronization with said latch signals and said definite non-video gradation data enable signal.

4. The apparatus as set forth in claim 1 , wherein said definite non-video gradation data represents black data.

5. The apparatus as set forth in claim 1 , wherein said definite non-video gradation data represents white data.

6. The apparatus as set forth in claim 1 , wherein said definite non-video gradation data represents an intermediate data between black data and white data.

7. The data line driver as set forth in claim 1 , wherein said display apparatus comprises a liquid crystal display apparatus.

8. A data line driver for driving data lines of a display apparatus, comprising:

a shift register adapted to shift a first start signal in synchronization with a clock signal to sequentially generate latch signals;

a data store circuit adapted to receive video data and non-video data via a data bus to latch the non-video data in response to a first control signal from an external controller;

a selector adapted to select the video data of said data bus or the non-video data of said data store circuit in response to a second control signal from the external controller;

a data register adapted to latch video data in synchronization with latch signals of said shift register and to latch non-video data in synchronization with said second control signal, so that the video data and the non-video data are latched at different timings;

a digital/analog converter adapted to convert latched data of said data register into an analog signal; and

an output buffer adapted to apply the analog signal of said digital/analog converter to said data lines.

9. The data line driver as set forth in claim 8 , wherein said non-video data comprises a definite gradation data.