IP Library Granted Patent US 7,602,063
Granted Patent B2
US 7,602,063 · App. 11/172,871 · Granted Oct 13, 2009

Semiconductor device and manufacturing method therefor

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Quick Facts
Patent No.
US 7,602,063
App. No.
11/172,871
Granted
Oct 13, 2009
Kind
B2
Abstract

In a semiconductor having a multilayer wiring structure device on a semiconductor substrate, the multilayer wiring structure includes an interlayer insulating film having at least an organic siloxane insulating film. The organic siloxane insulating film has a relative dielectric constant of 3.1 or less, a hardness of 2.7 GPa or more, and a ratio of carbon atoms to silicon atoms between 0.5 and 1.0, inclusive. Further, the multilayer wiring structure may include an insulating layer having a ratio of carbon atoms to silicon atoms not greater than 0.1, the insulating layer being formed on the top surface of the organic siloxane insulating film as a result of carbon leaving the organic siloxane insulating film.

Claims (32)

1. A semiconductor device comprising a multilayer wiring structure on a semiconductor substrate, wherein:

said multilayer wiring structure comprises an interlayer insulating film having at least an organic siloxane insulating film;

said organic siloxane insulating film has a relative dielectric constant of 3.1 or less, a hardness of 2.7 GPa or more, and a ratio of carbon atoms to silicon atoms between 0.5 and 1.0, inclusive,

said multilayer wiring structure comprises an insulating layer having a ratio of carbon atoms to silicon atoms not greater than 0.1, said insulating layer being formed on the top surface of said organic siloxane insulating film,

and wherein said insulating layer has a thickness between 5 nm and 15 nm, inclusive.

2. The semiconductor device according to claim 1 , wherein said organic siloxane insulating film has a hardness of 3.0 GPa or more.

3. The semiconductor device according to claim 1 , wherein said organic siloxane insulating film comprises Si—CH 3 bonds, Si—O—Si bonds, and Si—C—Si bonds.

4. The semiconductor device according to claim 1 , wherein the difference between the maximum and minimum thicknesses of said insulating layer is 20% or less of the average thickness of said insulating layer.

5. The semiconductor device according to claim 1 , wherein a barrier insulating film is formed on and in contact with said insulating layer,

wherein a trench is formed in said insulating layer and said organic siloxane insulating film,

wherein a via hole is formed in said organic siloxane insulating film,

wherein a bottom of said trench is in contact with a top of said via hole,

wherein a Cu wiring is formed in said trench and said via hole, and

wherein said barrier insulating film is formed on and in contact with said Cu wiring.

6. The semiconductor device according to claim 1 , wherein said organic siloxane insulating film has a hardness of 2.7-4.0 GPa.

7. The semiconductor device according to claim 1 , wherein said organic siloxane insulating film has a hardness of 3.0-4.0 GPa.

8. The semiconductor device according to claim 1 , wherein said insulating layer is formed on the top surface of said organic siloxane insulating film as a result of carbon leaving said organic siloxane insulating film.

9. A semiconductor device comprising a multilayer wiring structure on a semiconductor substrate, wherein:

said multilayer wiring structure comprises an interlayer insulating film having at least an organic siloxane insulating film;

said organic siloxane insulating film has a relative dielectric constant of 3.1 or less, a hardness of 2.7 GPa or more, and a ratio of carbon atoms to silicon atoms between 0.5 and 1.0, inclusive,

said multilayer wiring structure comprises an insulating layer which has a ratio of carbon atoms to silicon atoms not greater than 0.1 and is formed on the top surface of said organic siloxane insulating film, and

wherein a low dielectric constant insulating film is formed under and in contact with said organic siloxane insulating film, said low dielectric constant insulating film having a lower relative dielectric constant than said organic siloxane insulating film.

10. The semiconductor device according to claim 9 , wherein said low dielectric constant insulating film has a relative dielectric constant of 2.8 or less, a hardness of 1.8 GPa or less, and a ratio of carbon atoms to silicon atoms between 0.5 and 1.0, inclusive.

11. The semiconductor device according to claim 9 , wherein said multilayer wiring structure comprises a wiring groove and a via hole connected to said wiring groove, said wiring groove being provided in said organic siloxane insulating film and in a portion of said low dielectric constant insulating film, said via hole being provided in another portion of said low dielectric constant insulating film, said wiring groove and said via hole being filled with a conductive layer.

12. The semiconductor device according to claim 9 , further comprising a first insulating film which has a relative dielectric constant of 3.1 or less, a hardness of 2.7 GPa or more, and a ratio of carbon atoms to silicon atoms between 0.5 and 1.0, inclusive, wherein said multilayer wiring structure includes a wiring groove, the first insulating film, and a via hole connected to said wiring groove, said wiring groove being provided in said organic siloxane insulating film and in said low dielectric constant insulating film, said via hole being provided in said first insulating film, said wiring groove and said via hole being filled with a conductive layer.

13. The semiconductor device according to claim 9 , wherein a barrier insulating film is formed on and in contact with said insulating layer,

wherein a trench is formed in said insulating layer, said organic siloxane insulating film, and said low dielectric constant insulating film,

wherein a via hole is formed in said low dielectric constant insulating film,

wherein a bottom of said trench is in contact with a top of said via hole,

wherein a Cu wiring is formed in said trench and said via hole,

wherein said barrier insulating film is formed on and in contact with said Cu wiring, and

wherein said insulating layer has a thickness between 5 nm and 15 nm inclusive.

Assignments (4)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
MERGER Recorded Aug 25, 2010
From: RENESAS TECHNOLOGY CORP.
To: NEC ELECTRONICS CORPORATION
Reel/Frame 024879/0399 →
CHANGE OF NAME Recorded Aug 25, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 024879/0423 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 5, 2005
From: FURUSAWA, TAKESHI; MIURA, NORIKO; GOTO, KINYA; MATSUURA, MASAZUMI
To: RENESAS TECHNOLOGY CORP.
Reel/Frame 016751/0654 →