Nanotube- and nanocrystal-based non-volatile memory
View Patent ↗An embodiment is a transistor for non-volatile memory that combines nanocrystal and nanotube paradigm shifts. In particular an embodiment is a transistor-based non-volatile memory element that utilizes a carbon nanotube channel region and nanocrystal charge storage regions. Such a combination enables a combination of low power, low read and write voltages, high charge retention, and high bit density. An embodiment further exhibits a large memory window and a single-electron drain current.
1. An apparatus comprising:
a substrate;
a dielectric over the substrate;
a carbon nanotube in the dielectric to form a nanotube channel;
a source electrode and drain electrode on respective sides of the nanotube channel;
metal nanocrystals adjacent to the nanotube channel and between the source electrode and the drain electrode to form an array of discrete floating gates adjacent the carbon nanotube;
a tunnel oxide separating the nanocrystals and the carbon nanotube;
a gate electrode over the nanocrystals; and
a control oxide separating the gate and the nanocrystals.
2. The apparatus of claim 1 wherein the carbon nanotube is grown on the substrate.
3. The apparatus of claim 1 wherein the carbon nanotube is a single walled carbon nanotube.
4. The apparatus of claim 1 , the metal nanocrystals comprising a material selected from the group consisting of gold, silver, platinum, nickel, cobalt, gold silicide, silver silicide, platinum silicide, nickel silicide, and cobalt silicide.
5. A method comprising:
storing a charge on a floating gate of a nanotube transistor, the nanotube transistor including a substrate, a dielectric over the substrate, a nanotube channel comprising a carbon nanotube in the dielectric, a source electrode and a drain electrode on respective sides of the nanotube channel, a plurality of metal nanocrystals over the nanotube channel and between the source electrode and gate electrode forming an array of discrete floating gates, a tunnel oxide separating the nanotube channel and the plurality of metal nanocrystals, a gate electrode over the nanocrystals, and a control oxide separating the gate electrode and the plurality of metal nanorcystals; and
detecting the charge by measuring a drain current of the nanotube transistor.
6. The method of claim 5 , storing the charge on the floating gate further comprising:
applying an electric potential to the gate electrode of the nanotube transistor; and
injecting charge carriers to the floating gate.
7. The method of claim 5 further comprising:
discharging the floating gate.
8. The method of claim 7 , discharging the floating gate further comprising:
applying a negative electric potential to the gate electrode; and
draining the charge carriers to the source electrode.