IP Library Patent Application 11179828
Patent Application
App. No. 11/179,828

Apparatus and method for video decoding

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Quick Facts
Patent No.
US None
App. No.
11/179,828
Abstract

An apparatus and method for video decoding decodes a coded video bitstream with a smaller buffer to reconstruct a sequence and outputs it for reducing cost. The apparatus comprises a decoding component, a strip buffer and an outputting component. The decoding component receives the coded video bitstream and decodes it to reconstruct a decoded picture of the sequence. The strip buffer stores a fraction of the decoded picture. The outputting component reads the strip buffer and outputs the fraction of the decoded picture sequentially.

Claims (37)

1 . An apparatus for video decoding, which decodes a coded video bitstream and reconstructs and outputs a sequence, the apparatus comprising:

a decoding component for receiving and decoding the coded video bitstream to reconstruct a decoded picture of the sequence;

a strip buffer signal-connected to the decoding component for storing a fraction of the decoded picture; and

an outputting component signal-connected to the strip buffer for sequentially reading and outputting a fraction of the decoded picture stored in the strip buffer.

2 . The apparatus for video decoding as described in claim 1 , wherein the strip buffer comprises a plurality of strip buffer blocks; one of the strip buffer blocks is provided for the outputting component to read and to output information, and the other strip buffer blocks are provided for the decoding component to store other fractions of the decoded picture or a next decoded picture.

3 . The apparatus for video decoding as described in claim 2 , wherein the decoded picture is formed by a plurality of macroblocks, and each of the strip buffer blocks stores a fraction of the decoded picture that is F w ×MB h , in which F w is the horizontal width of the decoded picture and MB h is the vertical height of the macroblocks.

4 . The apparatus for video decoding as described in claim 2 , further comprising:

a controlling component signal-connected between the decoding component and the strip buffer, wherein the controlling component inhibits the decoding component to write into the strip buffer blocks before the strip buffer blocks are read by the outputting component, and permits the decoding component to write into the strip buffer blocks thereafter.

5 . The apparatus for video decoding as described in claim 4 , wherein the controlling component is integrated into the decoding component.

6 . The apparatus for video decoding as described in claim 1 , further comprising:

a frame buffer signal-connected to the decoding component and the outputting component for storing the decoded picture, wherein the decoded picture includes a reference picture and a non-reference picture, and the decoding component stores the reference picture in the frame buffer and the non-reference frame in the strip buffer.

7 . The apparatus for video decoding as described in claim 6 , wherein the decoded picture is formed by a plurality of macroblocks and the strip buffer comprises a plurality of strip buffer blocks, each of the strip buffer blocks stores a fraction of the decoded picture that is F w ×MB h , in which F w is the horizontal width of the decoded picture and MB h is the vertical height of the macroblocks.

8 . The apparatus for video decoding as described in claim 6 , further comprising:

a controlling component signal-connected between the decoding component and the strip buffer, wherein the controlling component inhibits the decoding component to write into the strip buffer blocks before the strip buffer blocks are read by the outputting component, and permits the decoding component to write into the strip buffer block thereafter.

9 . The apparatus for video decoding as described in claim 8 , wherein the controlling component is integrated into the decoding component.

10 . The apparatus for video decoding as described in claim 6 , wherein the strip buffer and the frame buffer are integrated into a memory.

11 . The apparatus for video decoding as described in claim 10 , wherein the memory is a random access memory.

12 . The apparatus for video decoding as described in claim 1 , wherein the coded video bitstream is coded with MPEG.

13 . A method for video decoding, which decodes a coded video bitstream and reconstructs and outputs a sequence, the method comprising:

receiving and decoding the coded video bitstream to reconstruct a decoded picture of the sequence;

storing a fraction of the decoded picture in a strip buffer; and reading and outputting in sequence a fraction of the decoded picture in the strip buffer.

14 . The method for video decoding as described in claim 13 , wherein the strip buffer comprises a plurality of strip buffer blocks; one of the strip buffer blocks is provided for the outputting component to read and to output information, and the other strip buffer blocks are provided for the decoding component to store other fractions of the decoded picture or next decoded picture.

15 . The method for video decoding as described in claim 14 , wherein the decoded picture is formed by a plurality of macroblocks, and each of the strip buffer blocks stores a fraction of the decoded picture that is F w ×MB h , in which F w is the horizontal width of the decoded picture and MB h is the vertical height of the macroblocks.

16 . The method for video decoding as described in claim 14 , further comprising:

a controlling step to inhibit storing a fraction of the decoded picture in the strip buffer blocks before the information in the strip buffer blocks is output, and to permit storing in the strip buffer blocks thereafter.

17 . The method for video decoding as described in claim 13 , wherein the coded video bitstream is coded with MPEG.

18 . A method for video decoding, which decodes a coded video bitstream and reconstructs and outputs a sequence, the method comprising:

receiving and decoding the coded video bitstream to reconstruct a decoded picture of the sequence, the decoded picture comprising a reference picture and a non-reference picture;

storing the reference picture in a frame buffer;

storing a fraction of the non-reference picture in a strip buffer; and

reading and outputting in sequence a fraction of the non-reference picture in the strip buffer.

19 . The method for video decoding as described in claim 18 , wherein the decoded picture is formed by a plurality of macroblocks and the strip buffer comprises a plurality of strip buffer blocks, each of the strip buffer blocks stores a fraction of the decoded picture that is F w ×MB h , in which F w is the horizontal width of the decoded picture and MB h is the vertical height of the macroblocks.

20 . The method for video decoding as described in claim 18 , further comprising:

a controlling step to inhibit storing a fraction of the decoded picture in the strip buffer blocks before the information in the strip buffer blocks is output and to permit storing in the strip buffer block thereafter.

21 . The method for video decoding as described in claim 18 , wherein the strip buffer and the picture buffer are integrated into a memory.

22 . The method for video decoding as described in claim 21 , wherein the memory is a random access memory.

23 . The method for video decoding as described in claim 18 , wherein the coded video bitstream is coded with MPEG.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 16, 2008
From: CHEERTEK INC.
To: NOVATEK MICROELECTRONICS CORP.
Reel/Frame 021230/0862 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 22, 2005
From: HSU, JUNG-FU; WANG, CHIH-MING
To: CHEERTEK INC.
Reel/Frame 016907/0035 →