IP Library Granted Patent US 7,295,067
Granted Patent B2
US 7,295,067 · App. 11/181,891 · Granted Nov 13, 2007

Current source circuit and differential amplifier

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Quick Facts
Patent No.
US 7,295,067
App. No.
11/181,891
Granted
Nov 13, 2007
Kind
B2
Abstract

A current source block and a negative resistance generation block are connected in parallel. The negative resistance generation block generates a negative resistance in response to the minute variations of an output voltage. Thus the output resistance of a current source circuit is given by the combined resistance of the negative resistance and the resistance of a resistor in the current source block connected in parallel. The resistance of the resistor in the current source block and the negative resistance are controlled to be substantially the same to thereby increase the output resistance of the current source circuit. The current source circuit serves to increase an output resistance when viewed from an differential output terminal. As a result, use of this current source circuit realizes a differential amplifier providing a high gain.

Claims (31)

1. A current source circuit, comprising:

an output terminal;

a first current source including an internal resistor and connected to said output terminal;

an inverting amplifier for inverting an output signal sent from said output terminal to provide an inverted output signal;

a MOS transistor having a current input terminal connected to said output terminal, and a voltage-controlled terminal connected to the output of said inverting amplifier and receiving said inverted output signal; and

a second current source including an internal resistor having one end connected to a current output terminal of said MOS transistor, and another end that is grounded.

2. A differential amplifier, comprising:

a differential input terminal;

a differential output terminal providing a differential output signal formed by amplifying a differential input signal sent from said differential input terminal;

a negative resistance generation block generating a negative resistance and connected to said differential output terminal; and

a second differential output terminal providing an inverted differential output signal inverted with respect to said differential output signal,

wherein said negative resistance generation block comprises:

a voltage-controlled current source having a current input terminal connected to said differential output terminal, and a voltage-controlled terminal connected to said second differential output terminal and receiving said inverted differential output signal;

a current source including an internal resistor having one end connected to a current output terminal of said voltage-controlled current source, and another end that is grounded; and

a second current source ac-coupled in parallel to said current source.

3. The differential amplifier according to claim 2 ,

wherein said voltage-controlled current source is a MOS transistor, and

wherein said current source and said second current source are MOS transistors operating in a saturation region.

4. The differential amplifier according to claim 2 ,

wherein said voltage-controlled current source is a MOS transistor, and

wherein said current source and said second current source include cascode connection of transistors.

5. A differential amplifier, comprising:

a differential input terminal;

a first differential output terminal providing a differential output signal formed by amplifying a differential input signal sent from said differential input terminal;

a second differential output terminal providing an inverted differential output signal inverted with respect to said differential output signal;

a load having one end connected to a power source voltage and another end connected to said first differential output terminal;

a voltage-controlled current source having a current input terminal connected to said first differential output terminal, and a voltage-controlled terminal connected to said differential input terminal and receiving said differential input signal;

a constant current source having one end connected to a current output terminal of said voltage-controlled current source, and another end that is grounded;

a MOS transistor having a current input terminal connected to said first differential output terminal, and a voltage-controlled terminal connected to said second differential output terminal and receiving said inverted differential output signal;

a first current source including an internal resistor having one end connected to a current output terminal of said MOS transistor, and another end that is grounded; and

a second current source having one end connected to said power source voltage and another end connected to said first current source.

Assignments (3)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
CHANGE OF NAME Recorded Sep 9, 2010
From: RENESAS TECHNOLOGY CORP.
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025008/0390 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 15, 2005
From: KAMAKURA, MASAOMI; MIKI, TAKAHIRO
To: RENESAS TECHNOLOGY CORP.
Reel/Frame 016787/0769 →