Assemblies with bond pads of two or more semiconductor devices electrically connected to the same surface of a plurality of leads
View Patent ↗A semiconductor device includes two or more semiconductor devices with bond pads that are electrically connected to the same, single surface of a plurality of leads. The two or more devices may include substantially centrally located bond pads or substantially identically arranged bond pads.
1. A semiconductor device assembly, comprising:
a first semiconductor die including a centerline extending along a length of the first semiconductor die and bond pads aligned adjacent to or along the centerline;
a second semiconductor die including a centerline extending along a length of the second semiconductor die and bond pads aligned adjacent to or along the centerline;
a plurality of leads including opposite major surfaces, with only a single surface including plating to facilitate electrical connection thereto, a surface of each lead of the plurality including the plating;
a plurality of electrical connection elements, every electrical connection element of the semiconductor device assembly extending between a bond pad of one of the first and second semiconductor dice and the plating on the single surface of a corresponding lead of the plurality of leads; and
a molded encapsulant covering the first and second semiconductor dice and encapsulating the plurality of electrical connection elements.
2. The semiconductor device assembly of claim 1 , wherein each electrical connection element of the plurality of electrical connection elements is secured to the plating.
3. The semiconductor device assembly of claim 1 , wherein at least some of the plurality of electrical connection elements comprise bond wires.
4. The semiconductor device assembly of claim 3 , wherein the bond wires comprise stitch bonds.
5. The semiconductor device assembly of claim 1 , wherein at least some of the leads of the plurality of leads extend over a surface of the first semiconductor die.
6. The semiconductor device assembly of claim 5 , wherein electrical connection elements of the plurality of electrical connection elements that connect bond pads of the first semiconductor die to corresponding leads of the plurality of leads are secured to locations of the corresponding leads that are proximate to the bond pads.
7. The semiconductor device assembly of claim 6 , wherein electrical connection elements of the plurality of electrical connection elements that connect bond pads of the second semiconductor die to corresponding leads of the plurality of leads extend beyond an outer periphery of the second semiconductor die.
8. The semiconductor device assembly of claim 1 , wherein each electrical connection element of the plurality of electrical connection elements extends beyond an outer periphery of at least one of the first and second semiconductor dice.
9. The semiconductor device assembly of claim 1 , wherein the corresponding leads of the plurality of leads comprise downsets.
10. The semiconductor device assembly of claim 9 , wherein the downsets position the first and second semiconductor dice relative to a plane in which outer ends of the corresponding leads are located.
11. The semiconductor device assembly of claim 10 , further comprising a packaging material covering at least portions of the first and second semiconductor dice and portions of the plurality of leads adjacent thereto.
12. The semiconductor device assembly of claim 11 , wherein the downsets are configured to impart the semiconductor device assembly with dimensions that are substantially the same as those of a standard thin small outline package.
13. The semiconductor device assembly of claim 1 , further comprising adhesive material.
14. The semiconductor device assembly of claim 13 , wherein the adhesive material secures the second semiconductor die to at least one of the first semiconductor die and the plurality of leads.
15. The semiconductor device assembly of claim 14 , wherein the adhesive material substantially encapsulates electrical connection elements of the plurality of electrical connection elements that connect the bond pads of the first semiconductor die to corresponding leads of the plurality of leads.
16. The semiconductor device assembly of claim 1 , wherein the first and second semiconductor dice are oriented such that an active surface of the first semiconductor die faces in substantially the same direction as an active surface of the second semiconductor die.
17. The semiconductor device assembly of claim 1 , wherein the first and second semiconductor dice are oriented such that active surfaces thereof face one another.
18. The semiconductor device assembly of claim 1 , wherein the first and second semiconductor dice are oriented in backside-to-backside relation.
19. The semiconductor device assembly of claim 1 , wherein the plurality of electrical connection elements have substantially the same lengths as one another.
20. The semiconductor device assembly of claim 19 , wherein the plurality of electrical connection elements have substantially the same electrical characteristic as one another.
21. The semiconductor device assembly of claim 1 , wherein inner portions of the corresponding leads of the plurality of leads are bent such that a first region of the single surface of each lead faces in an opposite direction from a second region of the single surface thereof.
22. The semiconductor device assembly of claim 1 , further comprising:
a packaging material covering at least portions of the first and second semiconductor dice and portions of the plurality of leads located adjacent thereto.
23. A semiconductor device assembly, comprising:
first and second semiconductor dice including bond pads arranged in identical connection patterns;
a plurality of leads comprising opposite major surfaces, only one surface of each lead of the plurality including plating to facilitate electrical connection;
a plurality of electrical connection elements between bond pads of the first and second semiconductor dice and the plating on the one surface of each lead of the plurality of leads; and
a molded encapsulant covering the first and second semiconductor dice and encapsulating the plurality of electrical connection elements.
24. The semiconductor device assembly of claim 23 , wherein each electrical connection element of the plurality of electrical connection elements is secured to the plating.
25. The semiconductor device assembly of claim 23 , wherein at least some of the plurality of electrical connection elements comprise bond wires.
26. The semiconductor device assembly of claim 25 , wherein the bond wires comprise stitch bonds.
27. The semiconductor device assembly of claim 23 , wherein at least some of the leads of the plurality of leads extend over a surface of the first semiconductor die.
28. The semiconductor device assembly of claim 23 , wherein the bond pads of the first and second semiconductor dice are peripherally located.
29. The semiconductor device assembly of claim 28 , wherein each electrical connection element of the plurality of electrical connection elements extends beyond outer peripheries of the first and second semiconductor dice.
30. The semiconductor device assembly of claim 23 , wherein the bond pads of the first and second semiconductor dice are substantially centrally located.
31. The semiconductor device assembly of claim 30 , wherein electrical connection elements of the plurality of electrical connection elements that connect bond pads of the first semiconductor die to corresponding leads of the plurality of leads are secured to locations of the corresponding leads that are proximate to the bond pads.
32. The semiconductor device assembly of claim 31 , wherein electrical connection elements of the plurality of electrical connection elements that connect bond pads of the second semiconductor die to corresponding leads of the plurality of leads extend beyond an outer periphery of the second semiconductor die.
33. The semiconductor device assembly of claim 23 , wherein each electrical connection element of the plurality of electrical connection elements extends beyond an outer periphery of at least one of the first and second semiconductor dice.
34. The semiconductor device assembly of claim 23 , wherein the leads of the plurality of leads comprise downsets.
35. The semiconductor device assembly of claim 34 , wherein the downsets position the first and second semiconductor dice relative to a plane in which outer ends of the leads are located.
36. The semiconductor device assembly of claim 35 , further comprising:
a packaging material covering at least portions of the first and second semiconductor dice and portions of the plurality of leads adjacent thereto.
37. The semiconductor device assembly of claim 36 , wherein the downsets are configured to impart the semiconductor device assembly with dimensions that are substantially the same as those of a standard thin small outline package.
38. The semiconductor device assembly of claim 23 , further comprising adhesive material.
39. The semiconductor device assembly of claim 38 , wherein the adhesive material secures the second semiconductor die to at least one of the first semiconductor die and the plurality of leads.
40. The semiconductor device assembly of claim 39 , wherein the adhesive material substantially encapsulates electrical connection elements of the plurality of electrical connection elements that connect the bond pads of the first semiconductor die to corresponding leads of the plurality of leads.
41. The semiconductor device assembly of claim 23 , wherein the first and second semiconductor dice are oriented such that an active surface of the first semiconductor die faces in substantially the same direction as an active surface of the second semiconductor die.
42. The semiconductor device assembly of claim 23 , wherein the first and second semiconductor dice are oriented such that active surfaces thereof face one another.
43. The semiconductor device assembly of claim 23 , wherein the first and second semiconductor dice are oriented in backside-to-backside relation.
44. The semiconductor device assembly of claim 23 , wherein the plurality of electrical connection elements have substantially the same lengths as one another.
45. The semiconductor device assembly of claim 44 , wherein the plurality of electrical connection elements have substantially the same electrical characteristic as one another.
46. The semiconductor device assembly of claim 23 , wherein inner portions of the leads of the plurality of leads are bent such that a first region of the one surface of each lead faces in an opposite direction from a second region of the one surface thereof.
47. The semiconductor device assembly of claim 23 , further comprising:
a packaging material covering at least portions of the first and second semiconductor dice and portions of the plurality of leads located adjacent thereto.
48. The semiconductor device assembly of claim 1 , wherein the molded encapsulant has a thickness of about one millimeter or less.
49. The semiconductor device assembly of claim 48 , wherein portions of the molded encapsulant extending over oppositely facing outer surfaces of an assembly including the first and second semiconductor dice have thicknesses of at least about 0.185 mm.
50. The semiconductor device assembly of claim 48 , wherein the first and second semiconductor dice have thicknesses of about 0.2 mm or less.
51. The semiconductor device assembly of claim 1 , wherein each conductive element of the plurality of conductive elements is located entirely over a surface of one of the first and second semiconductor dice.
52. The semiconductor device assembly of claim 23 , wherein the molded encapsulant has a thickness of about one millimeter or less.
53. The semiconductor device assembly of claim 52 , wherein portions of the molded encapsulant extending over oppositely facing outer surfaces of an assembly including the first and second semiconductor dice have thicknesses of at least about 0.185 mm.
54. The semiconductor device assembly of claim 52 , wherein the first and second semiconductor dice have thicknesses of about 0.2 mm or less.
55. The semiconductor device assembly of claim 23 , wherein each conductive element of the plurality of conductive elements is located entirely over a surface of one of the first and second semiconductor dice.