IP Library Granted Patent US 7,592,205
Granted Patent B2
US 7,592,205 · App. 11/183,658 · Granted Sep 22, 2009

Over-passivation process of forming polymer layer over IC chip

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Quick Facts
Patent No.
US 7,592,205
App. No.
11/183,658
Granted
Sep 22, 2009
Kind
B2
Abstract

A method for forming a semiconductor chip or wafer includes following steps. A semiconductor substrate is provided, and then a polymer layer is deposited over the semiconductor substrate, wherein the polymer layer comprises polyimide. The polymer layer with a temperature profile having a peak temperature between 200 and 320 degrees Celsius. Alternatively, the temperature profile may comprises a period of time with a temperature higher than 320 degree Celsius, wherein the period of time is shorter than 45 minutes.

Claims (36)

1. A method for forming a semiconductor wafer, comprising:

providing a silicon substrate, a first circuit layer over said silicon substrate, a second circuit layer over said silicon substrate and over said first circuit layer, a dielectric layer between said first and second circuit layers, an aluminum pad over said silicon substrate, and a passivation layer over said silicon substrate, over said first and second circuit layers and over said dielectric layer, wherein said passivation layer comprises an insulating nitride layer, and wherein an opening in said passivation layer is over said aluminum pad, and said aluminum pad is at a bottom of said opening in said passivation layer;

forming a metal layer on said aluminum pad and over said passivation layer;

after said forming said metal layer, forming a photoresist layer on said metal layer, wherein an opening in said photoresist layer is over said metal layer;

after said forming said photoresist layer, electroplating a gold layer on said metal layer under said opening in said photoresist layer;

after said electroplating said gold layer, removing said photoresist layer;

after said removing said photoresist layer, removing said metal layer not under said gold layer;

after said removing said metal layer, forming a first polyimide layer over said gold layer; and

after said forming said first polyimide layer, curing said first polyimide layer with a temperature profile having a peak temperature between 200 and 320 degrees Celsius.

2. The method of claim 1 , wherein said forming said metal layer comprises sputtering a titanium-containing layer on said aluminum pad and over said passivation layer.

3. The method of claim 2 , wherein said titanium-containing layer comprises a titanium-tungsten alloy.

4. The method of claim 1 , wherein said curing said first polyimide layer is performed in an ambient comprising nitrogen.

5. The method of claim 1 , wherein said curing said first polyimide layer is performed in an ambient comprising less than 500 ppm oxygen.

6. The method of claim 1 , wherein said curing said first polyimide layer is performed in an ambient comprising hydrogen.

7. The method of claim 1 , wherein said curing said first polyimide layer is performed at said peak temperature within 10 degrees Celsius deviation for longer than 20 minutes.

8. The method of claim 1 , wherein said peak temperature is between 240 and 300 degrees Celsius.

9. The method of claim 1 further comprising forming a second polyimide layer on said passivation layer, wherein an opening in said second polyimide layer is over said aluminum pad, followed by said forming said metal layer further on said second polyimide layer.

10. The method of claim 1 further comprising providing multiple sub-hundred-nanometer devices in or on said silicon substrate.

11. The method of claim 10 , wherein said sub-hundred-nanometer devices comprise 90-nanometer devices, 65-nanometer devices, or 35 nanometer devices.

12. A method for forming a semiconductor wafer, comprising:

providing a silicon substrate, a first circuit layer over said silicon substrate, a second circuit layer over said silicon substrate and over said first circuit layer, a dielectric layer between said first and second circuit layers, and a passivation layer over said silicon substrate, over said first and second circuit layers and over said dielectric layer, wherein said passivation layer comprises an insulating nitride layer;

forming a metal layer over said passivation layer;

after said forming said metal layer, forming a photoresist layer on said metal layer, wherein an opening in said photoresist layer is over said metal layer;

after said forming said photoresist layer, electroplating a gold layer on said metal layer under said opening in said photoresist layer;

after said electroplating said gold layer, removing said photoresist layer;

after said removing said photoresist layer, removing said metal layer not under said gold layer;

after said removing said metal layer, forming a first polyimide layer over said gold layer; and

after said forming said first polyimide layer, curing said first polyimide layer with a temperature profile having a peak temperature between 200 and 320 degrees Celsius.

13. The method of claim 12 , wherein said forming said metal layer comprises sputtering a titanium-containing layer over said passivation layer.

14. The method of claim 13 , wherein said titanium-containing layer comprises a titanium-tungsten alloy.

15. The method of claim 12 , wherein said curing said first polyimide layer is performed in an ambient comprising nitrogen.

16. The method of claim 12 , wherein said curing said first polyimide layer is performed in an ambient comprising less than 500 ppm oxygen.

17. The method of claim 12 , wherein said curing said first polyimide layer is performed in an ambient comprising hydrogen.

18. The method of claim 12 , wherein said curing said first polyimide layer is performed at said peak temperature within 10 degrees Celsius deviation for longer than 20 minutes.

19. The method of claim 12 , wherein said peak temperature is between 240 and 300 degrees Celsius.

20. The method of claim 12 further comprising forming a second polyimide layer on said passivation layer, followed by said forming said metal layer further on said second polyimide layer.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 11, 2014
From: MEGIT ACQUISITION CORP.
To: QUALCOMM INCORPORATED
Reel/Frame 033303/0124 →
MERGER Recorded Sep 25, 2013
From: MEGICA CORPORATION
To: MEGIT ACQUISITION CORP.
Reel/Frame 031283/0198 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 1, 2006
From: MEGIC CORPORATION
To: MEGICA CORPORATION
Reel/Frame 017951/0456 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 25, 2005
From: CHEN, YING-CHIH; LIN, MOU-SHIUNG; CHOU, CHIU-MING
To: MEGIC CORPORATION
Reel/Frame 017131/0358 →