IP Library Granted Patent US 7,728,432
Granted Patent B2
US 7,728,432 · App. 11/185,937 · Granted Jun 1, 2010

Narrow and wide copper interconnections composed of (111), (200) and (511) surfaces

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Quick Facts
Patent No.
US 7,728,432
App. No.
11/185,937
Granted
Jun 1, 2010
Kind
B2
Abstract

A semiconductor device includes: a semiconductor substrate; an insulating film provided on the semiconductor substrate; a plurality of copper interconnections provided on the same level in the insulating film. The copper interconnection includes: a first copper interconnection having a relatively narrow width; and a second copper interconnection having a relatively wide width. The first copper interconnection has the top surface thereof principally composed of copper, and the second copper interconnection has the top surface thereof principally composed of copper.

Claims (42)

1. A semiconductor device comprising:

a semiconductor substrate;

an insulating film provided on said semiconductor substrate;

a plurality of copper interconnections provided on the same level in said insulating film; and

a barrier metal provided between said copper interconnection and said insulating film,

wherein said copper interconnection comprises:

a first copper interconnection having a relatively narrow width; and

a second copper interconnection having a relatively wide width;

said first copper interconnection having a top surface thereof principally composed of (111) surface of copper, and said second copper interconnection having a top surface thereof principally composed of (200) surface of copper,

wherein said barrier metal provided between said first copper interconnection and said insulating film is Ta film, and said barrier metal that is Ta film contacts with said first copper interconnection, and

wherein said barrier metal provided between said second copper interconnection and said insulating film is TaN film, and said barrier metal that is TaN film contacts with said second copper interconnection.

2. The semiconductor device according to claim 1 , wherein said first copper interconnection has a line width of less than 0.3 μm, and said second copper interconnection has a line width of 0.3 μm or more.

3. The semiconductor device according to claim 1 , further comprising a via plug provided so as to be connected with the top surface of said second copper interconnection,

satisfying a relation below:

3r<D

where, r represents a diameter of said via plug, and D represents a line width of said second copper interconnection.

4. The semiconductor device according to claim 1 , satisfying a relation below:

C/D< 0.5

where C represents a height of said second copper interconnection, and D represents a line width of said second copper interconnection.

5. The semiconductor device according to claim 1 , wherein said second copper interconnection has a grain size approximately as large as several tens of μm, such that substantially no boundary is found in a direction of line width.

6. A semiconductor device comprising:

a semiconductor substrate;

an insulating film provided on said semiconductor substrate;

a plurality of copper interconnections provided on the same level in said insulating film; and

a barrier metal provided between said copper interconnection and said insulating film,

wherein said copper interconnection comprises:

a first copper interconnection having a relatively narrow width; and

a second copper interconnection having a relatively wide width;

said first copper interconnection having a top surface thereof principally composed of (111) and (511) surface of copper, and said second copper interconnection having a top surface thereof principally composed of (200) surface of copper,

wherein said barrier metal provided between said first copper interconnection and said insulating film is composed of Ta, and said barrier metal composed of Ta contacts with said first copper interconnection,

wherein said barrier metal provided between said second copper interconnection, and said insulating film is composed of TaN and said barrier metal composed of TaN contacts with said second copper interconnection,

wherein said barrier metal provided between said first copper interconnection and said insulating film is Ta film, and said barrier metal that is Ta film contacts with said first copper interconnection, and

wherein said barrier metal provided between said second copper interconnection and said insulating film is TaN film, and said barrier metal that is TaN film contacts with said second copper interconnection.

7. The semiconductor device according to claim 6 , wherein said first copper interconnection has a line width of less than 0.3 μm, and said second copper interconnection has a line width of 0.3 μm or more.

8. The semiconductor device according to claim 6 , further comprising a via plug provided so as to be connected with the top surface of said second copper interconnection,

satisfying a relation below:

3r<D

where, r represents a diameter of said via plug, and D represents a line width of said second copper interconnection.

9. The semiconductor device according to claim 6 , satisfying the relation below:

C/D< 0.5

where C represents a height of said second copper interconnection, and D represents a line width of said second copper interconnection.

10. The semiconductor device according to claim 6 , wherein said second copper interconnection has a grain size approximately as large as several tens of μm, such that substantially no boundary is found in a direction of line width.

Assignments (3)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
CHANGE OF NAME Recorded Nov 11, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025346/0886 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 21, 2005
From: TAKEWAKI, TOSHIYUKI; KUNISHIMA, HIROYUKI
To: NEC ELECTRONICS CORPORATION
Reel/Frame 016802/0235 →