Semiconductor device and method for manufacturing the same
View Patent ↗A method for manufacturing a semiconductor device includes forming a gate insulating layer, a gate and a protective layer on a semiconductor substrate, forming a spacer on lateral sides of the protective layer and the gate, forming one or more junction regions in the semiconductor substrate at sides of the gate, partially filling a gap between adjacent gates by selectively forming a conductive layer on an exposed portion of the semiconductor substrate between the adjacent gates, forming an insulating layer over the semiconductor substrate so as to fill a full height of the gap between the adjacent gates, and forming a contact hole partially exposing the conductive layer by etching the insulating layer.
1. A method for manufacturing a semiconductor device comprising:
forming a gate insulating layer, a gate and a protective layer on a semiconductor substrate;
forming a spacer on lateral sides of the protective layer and the gate to completely cover lateral sides of the protective layer and the gate;
forming a junction region in the semiconductor substrate at sides of the gate and/or spacer;
partially filling a gap between gates by selectively forming a silicon layer on an exposed portion of the semiconductor substrate between the spacers sufficiently to reduce formation of voids in a subsequently formed insulating layer, wherein the silicon layer is thicker than the protective layer;
forming the insulating layer on the silicon layer, the spacers, and over the semiconductor substrate so as to fill a full height of the gap, and
forming a contact hole partially exposing the silicon layer by etching the insulating layer such that the spacers remain covered by the insulating layer.
2. The method of claim 1 , wherein the protective layer comprises an oxide layer or a nitride layer.
3. The method of claim 2 , wherein forming the silicon layer comprises epitaxially growing the silicon layer.
4. The method of claim 2 , wherein the insulating layer comprises a borophosphosilicate glass (BPSG) layer or a phosphosilicate glass (PSG) layer.
5. The method of claim 2 , further comprising depositing a second conductive material on the insulating layer so as to fill the contact hole.
6. The method of claim 5 , wherein the conductive material comprises metal.
7. The method of claim 6 , further comprising patterning or polishing the second conductive material, thereby forming a wire contacting the junction region.
8. The method of claim 1 , wherein forming the silicon layer comprises epitaxially growing the silicon layer.
9. The method of claim 1 , wherein the contact hole has an overcut profile.
10. The method of claim 1 , wherein the insulating layer comprises a borophosphosilicate glass (BPSG) layer or a phosphosilicate glass (PSG) layer.
11. The method of claim 1 , further comprising depositing a second conductive material on the insulating layer so as to fill the contact hole.
12. The method of claim 11 , wherein the conductive material comprises metal.
13. The method of claim 11 , further comprising patterning or polishing the second conductive material, thereby forming a wire contacting the junction region.