Electro-optical device, method of driving electro-optical device, and electronic apparatus
A method of driving an electro-optical device that has a plurality of pixel circuits provided so as to correspond to intersections of a plurality of scanning lines and a plurality of data lines, a first scanning line driving circuit for selecting odd-numbered scanning lines, a second scanning line driving circuit for selecting even-numbered scanning lines, and a data line driving circuit for supplying data signals corresponding to the selected scanning line through the data lines. The method includes, in a first mode, supplying enable signals having different phases to the first and second scanning line driving circuits, respectively, so as to alternately select odd-numbered and even-numbered scanning lines, and, in a second mode different from the first mode, supplying enable signals having the same phase to the first and second scanning line driving circuits, respectively, so as to simultaneously select adjacent odd-numbered and even-numbered scanning lines two by two.
1. A method of driving an electro-optical device, the device comprising:
pixel circuits arranged corresponding to intersections of a plurality of scanning lines and a plurality of data lines;
a first scanning line driving circuit that selects odd-numbered lines from among the plurality of scanning lines in a predetermined sequence;
a second scanning line driving circuit that selects even-numbered lines from among the plurality of scanning lines in a predetermined sequence; and
a data line driving circuit that supplies data signals corresponding to grayscale levels of pixels to pixel circuits corresponding to selected scanning lines through data lines;
the first and second scanning line driving circuits comprising:
a shift register that generates output signals that select scanning lines in a predetermined sequence by a shift operation of a pulse signal by a clock signal; and
an output control circuit that narrows the output signals to pulse widths of enable signals and outputs the output signals as scanning signals that select scanning lines,
the method comprising:
in a predetermined first mode, supplying enable signals whose phases are different from each to the first and second scanning line driving circuits, and alternately selecting the odd-numbered and even-numbered scanning lines; and
in a second mode different from the first mode, supplying enable signals with substantially the same phase to the first and second scanning line driving circuits, and simultaneously selecting two of the scanning lines, the two scanning lines being an even-numbered line and an odd-numbered line that are adjacent to each other,
wherein the output control circuit provided in each of the first and second scanning line driving circuits comprises:
a first logic circuit that generates a logic signal based on a first output signal of a first level output by the shift register and a second output signal of a second level adjacent to the first level; and
a second logic circuit that generates the scanning signal based on the logic signal and the enable signal, and
within a logic signal pulse generation period in which the logic signal changes from a predetermined level to a level different from the predetermined level, a scanning signal pulse is generated, which corresponds to the logic signal which changes from the predetermined level to the level different from the predetermined level, and the width of the logic signal pulse is wider than that of the scanning signal pulse,
wherein the enable signals are pulse signals having a duty ratio of substantially 50%, and
in the case of the first mode, the phase of the enable signal that is supplied to the second scanning line driving circuit is shifted by substantially 180 degrees with respect to the phase of the enable signal that is supplied to the first scanning line driving circuit.
2. A method of driving an electro-optical device, the device comprising:
pixel circuits arranged corresponding to intersections of a plurality of scanning lines and a plurality of data lines;
a first scanning line driving circuit that selects odd-numbered lines from among the plurality of scanning lines in a predetermined sequence;
a second scanning line driving circuit that selects even-numbered lines from among the plurality of scanning lines in a predetermined sequence; and
a data line driving circuit that supplies data signals corresponding to grayscale levels of pixels to pixel circuits corresponding to selected scanning lines through data lines;
the first and second scanning line driving circuits comprising:
a shift register that generates output signals that select scanning lines in a predetermined sequence by a shift operation of a pulse signal by a clock signal; and
an output control circuit that narrows the output signals to pulse widths of enable signals and outputs the output signals as scanning signals that select scanning lines,
the method comprising:
in a predetermined first mode, supplying enable signals whose phases are different from each to the first and second scanning line driving circuits, and alternately selecting the odd-numbered and even-numbered scanning lines; and
in a second mode different from the first mode supplying enable signals with substantially the same phase to the first and second scanning line driving circuits, and simultaneously selecting two of the scanning lines, the two scanning lines being an even-numbered line and an odd-numbered line that are adjacent to each other,
wherein the output control circuit provided in each of the first and second scanning line driving circuits comprises:
a first logic circuit that generates a logic signal based on a first output signal of a first level output by the shift register and a second output signal of a second level adjacent to the first level; and
a second logic circuit that generates the scanning signal based on the logic signal and the enable signal, and
within a logic signal pulse generation period in which the logic signal changes from a predetermined level to a level different from the predetermined level, a scanning signal pulse is generated, which corresponds to the logic signal which changes from the predetermined level to the level different from the predetermined level, and the width of the logic signal pulse is wider than that of the scanning signal pulse,
wherein the output control circuit is divided into a circuit group that narrows the output signals to a pulse width of a first series of enable signals and selects a first series of scanning lines, and a circuit group that narrows the output signals to a pulse width of a second series of enable signals in which the phase is shifted by substantially 180 degrees from the enable signals of the first series,
in the first mode, the phases of the enable signals of the first and second series supplied to the first scanning line driving circuit and the phases of the enable signals of the first and second series supplied to the second scanning driving circuit are shifted by substantially 90 degrees and supplied, and
in the second mode, the phases of the enable signals of the first and second series supplied to the first scanning line driving circuit and the phases of the enable signals of the first and second series supplied to the second scanning driving circuit are supplied as substantially the same phase.