Vertical field effect transistor
View Patent ↗A MOSFET has a base layer and a source layer in a cell surrounded by a trench gate formed in a semiconductor substrate. A trench contact is formed through the source layer and the base layer. The gate is polygonal such as square. The trench contact is thin and linear so as to increase embedding characteristics. Further, the trench contact is ring or cross shaped so as to reduce a source length.
1. A field effect transistor comprising:
a base layer and a source layer formed in a cell surrounded by a trench gate in a semiconductor substrate, said base and source layers comprising a linear ring shape trench;
a trench contact formed in the linear ring-shaped trench of said source and base layers and extending from a first surface of the semiconductor substrate;
a source electrode formed above the first surface and connected to the trench contact; and
a drain electrode formed on a second surface opposite from the first surface,
wherein the trench contact comprises a linear ring shape when viewed from the first surface and is surrounded by the trench gate, and
wherein the trench contact has a width in a range from of 0.3 μm to 1.2 μm.
2. The field effect transistor of claim 1 , wherein the source layer comprises a first portion which is formed between the trench gate and the trench contact, and a second portion which is separate from the first portion and surrounded by the trench contact.
3. The field effect transistor of claim 1 , wherein the gate has a polygonal shape, and the source layer is divided or notched by a dividing part or a notch pan formed diagonally in the polygonal shape.
4. The field effect transistor of claim 1 , wherein the trench contact comprises tungsten.
5. The field effect transistor of claim 1 , wherein the gate comprises a hexagonal lattice shape when viewed from the first surface, and the trench contact comprises a hexagonal ring shape when viewed from the first surface.
6. The field effect transistor of claim 3 , wherein the source layer comprises a plurality of parts and the trench contact contacts each of said plurality of parts.
7. The field effect transistor of claim 6 , wherein the plurality of parts comprises a plurality of fan-shaped parts.
8. The field effect transistor of claim 1 , wherein a bottom portion of the trench contact is formed deeper than a bottom portion of the source layer and formed in the base layer.
9. The field effect transistor of claim 1 , wherein said cell comprises a side having a length in a range from 3 μm to 4 μm.
10. The field effect transistor of claim 1 , wherein the trench contact has a width of 0.4 μm to 0.8 μm.
11. The field effect transistor of claim 1 , wherein a source length, L, which comprises a distance between said trench gate and said trench contact, is 0.3 μm to 0.6 μm.
12. The field effect transistor of claim 1 , wherein the trench contact is placed substantially the same distance from each side of the gate.
13. The field effect transistor of claim 1 , further comprising:
an interlayer oxide film formed on said source layer and comprising an inner portion which is formed inside said linear ring shape of said trench contact, and an outer portion which is formed outside said linear ring shape of said trench contact.
14. The field effect transistor of claim 1 , wherein said trench contact is symmetric about a central area of the cell.
15. A field effect transistor cell comprising:
a semiconductor substrate comprising:
a base layer having a first conductivity type; and
a source layer formed on said base layer and having a second conductivity type different than said first conductivity type;
a trench gate formed in said semiconductor substrate around an outer periphery of said cell, and around said source and base layers;
an interlayer oxide film formed on said source layer and on said trench gate; and
a linear ring-shaped trench contact formed in said interlayer oxide film and said source and base layers, the trench contact being symmetric about a central area of said cell and having a width in a range from of 0.3 μm to 1.2 μm.
16. A field effect transistor cell comprising:
a drain electrode;
a semiconductor substrate formed on said drain electrode, comprising:
a base layer having a first conductivity type; and
a source layer formed on said base layer and having a second conductivity type different than said first conductivity type;
a trench gate formed in said semiconductor substrate around an outer periphery of said cell, and around said source and base layers;
an interlayer oxide film formed on said source layer and on said trench gate;
a linear ring-shaped trench contact formed in said interlayer oxide film and said source and base layers, the trench contact being symmetric about a central area of said cell and having a width in a range from of 0.3 μm to 1.2 μm; and
a source electrode formed on said interlayer oxide film and connected to the trench contact,
wherein the source layer comprises a first portion which is formed between the trench gate and the trench contact, and a second portion which is formed in the central area of the cell and is separate from the first portion and surrounded by the trench contact, and
wherein a source length, L, which comprises a distance between said trench gate and said trench contact, is in a range from 0.3 μm to 0.6 μm.
17. The field effect transistor of claim 15 , wherein the trench contact comprises tungsten.
18. The field effect transistor of claim 16 , wherein the trench contact comprises tungsten.
19. The field effect transistor of claim 1 , wherein said base layer comprises a linear ring-shaped base contact layer formed under the linear ring-shaped trench in said base layer.