Semiconductor processing method for increasing usable surface area of a semiconductor wafer
The invention provides a method for increasing the usable surface area of a semiconductor wafer having a substantially planar surface and a thickness dimension at right angles to said substantially planar surface, the method including the steps of selecting a strip thickness for division of the wafer into a plurality of strips, selecting a technique for cutting the wafer into the strips at an angle to the substantially planar surface, in which the combined strip thickness and width of wafer removed by the cutting is less than the thickness of the wafer, cutting the wafer into strips using the selected technique and separating the strips from each other.
1. A semiconductor wafer, the semiconductor wafer having an upper surface, a lower surface and a plurality of slots extending from the upper surface to the lower surface, the slots having a slot width and defining a plurality of semiconductor strips disposed between adjacent slots, the strips having a strip width in the plane of the upper surface of the wafer, wherein the sum of the strip width and the slot width is less than the thickness of the wafer, each semiconductor strip having a front surface extending from the upper surface of the wafer to the bottom surface of the wafer, a rear surface extending from the upper surface of the wafer to the bottom surface of the wafer, a first side surface located in the same plane as and forming part of the upper surface of the wafer and a second side surface located in the same plane as and forming part of the lower surface of the wafer, wherein corresponding ends of the semiconductor strips are interconnected and form part of a portion of the wafer which surrounds the plurality of slots so as to form a protective frame.
2. A semiconductor wafer as claimed in claim 1 , wherein the semiconductor strip is polycrystalline silicon.
3. A semiconductor wafer as claimed in claim 1 , wherein the semiconductor strip is single crystal silicon.
4. A semiconductor product manufactured from a single semiconductor substrate consisting of an arrangement of semiconductor strips held within a frame, each strip having a strip width and being separated from adjacent strips by a slot having a slot width, wherein the sum of the strip width and the slot width is less than the thickness of the substrate.
5. A semiconductor product as claimed in claim 4 where the frame consists of the same type of semiconductor as the strips.
6. A semiconductor product as claimed in claim 4 where the thickness of the substrate is typically about 1 mm.
7. A semiconductor product as claimed in claim 4 where the product was formed by anisotropic wet etching.
8. A semiconductor product as claimed in claim 4 where the spacing of the strips is less than 50 microns.
9. A semiconductor product as claimed in claim 4 where there are interconnecting portions to maintain spaces between each of the strips.
10. A semiconductor product as claimed in claim 4 where the thickness of the strips is less than 250 microns.
11. A semiconductor product as claimed in claim 4 where the thickness of the strips is less than 100 microns.
12. A semiconductor product as claimed in claim 4 where the width of the strips is typically about 5 microns.
13. A semiconductor product as claimed in claim 4 where the semiconductor is silicon.
14. A semiconductor product as claimed in claim 4 where the silicon is multicrystalline silicon.
15. A semiconductor product as claimed in claim 4 where the silicon is single crystal silicon.
16. A semiconductor product as claimed in claim 4 where the silicon is monocrystalline silicon.
17. A semiconductor product as claimed in claim 4 where the strips are at least partially coated with a dielectric material.
18. A semiconductor product as claimed in claim 17 wherein the semiconductor is either single crystal silicon, monocrystalline silicon, multicrystalline silicon or polycrystalline silicon.
19. A semiconductor product as claimed in claim 17 where the dielectric is silicon oxide.
20. A semiconductor product as claimed in claim 17 where the dielectric is silicon nitride.
21. A semiconductor product as claimed in claim 4 where the strips are at least part of the surface of the strips are diffused with a dopant.
22. A semiconductor product as claimed in claim 21 where the dopant is boron.
23. A semiconductor product as claimed in claim 21 where the dopant is phosphorus.
24. A semiconductor product formed from a semiconductor wafer comprising a plurality of semiconductor strips having a strip width, each strip being at least partially separated from one another by slots having a slot width, the strips being held within the supporting frame, wherein the sum of the strip width and the slot width is less than the thickness of the wafer.
25. A semiconductor product as claimed in claim 24 wherein the strips are silicon strips and the supporting frame is a silicon frame.
26. A semiconductor product as claimed in claim 24 wherein the supporting frame is integral with the strips.
27. A semiconductor product as claimed in claim 24 wherein the supporting frame is about 5 mm wide.
28. A semiconductor product as claimed in claim 24 wherein the supporting frame comprises the periphery of the semiconductor wafer.
29. A semiconductor product as claimed in claim 28 wherein the slots are formed entirely through the semiconductor wafer.
30. A semiconductor product as claimed in claim 28 wherein the wafer is an entire wafer or a portion thereof.
31. A semiconductor product as claimed in claim 28 wherein the slots are formed partly through the semiconductor wafer.
32. A semiconductor product as claimed in claim 28 wherein the slots are formed at an angle to the surface of the wafer, wherein the angle is within the range of 5 degrees to 90 degrees.
33. A semiconductor product as claimed in claim 32 wherein the slots are formed at an angle to the surface of the wafer, wherein the angle is one of about 30 degrees, 45 degrees, 60 degrees or 90 degrees.
34. A semiconductor product as claimed in claim 24 wherein the width of each of the slots is in the range of between 10 and 20 micrometers.
35. A semiconductor product as claimed in claim 24 further comprising at least one interconnecting portion connecting adjoining strips wherein the interconnecting portion is a strip.
36. A semiconductor product as claimed in claim 35 wherein the interconnecting portion is about 0.1 mm wide.
37. A semiconductor product as claimed in claim 35 comprising a plurality of interconnecting portions between adjacent strips.
38. A semiconductor product as claimed in claim 37 wherein each of the interconnecting portions are about 0.1 mm wide, about 0.05 mm high and spaced about 10 mm apart.
39. A semiconductor product as claimed in claim 35 wherein the interconnecting portions are spaced apart at regular intervals along the length of the strips.
40. A semiconductor product as claimed in claim 24 wherein the strips are thin and very narrow.