Non-volatile memory device and method for programming/erasing the same
The present invention provides a SONOS type nonvolatile or flash memory device and related programming/erasing methods. The device has a deep well region of a first conductive type that isolates a well region of a second conductive type from a substrate to enhance programming and erasing operation characteristics. In the erasing method, first electrons are erased by one of Hot Hole Injection (e.g., gate-to-drain Hot Hole Injection) or tunneling in a first step, and second electrons that are not erased in the first step are erased by the other of tunneling (e.g., gate-to-body tunneling) or HHI in a second step. Preferably, a time gap intervenes between the first and second steps.
1 . A non-volatile memory device comprising:
a deep well region of a first conductive type in a semiconductor substrate;
a well region of a second conductive type in the semiconductor substrate, isolated from the semiconductor substrate by the deep well region;
a stack structure on a channel region of the semiconductor substrate, having a tunnel oxide layer, a trap nitride layer, and a block oxide layer;
a gate on the block oxide layer; and
source/drain regions comprising first conductive type impurity ions in a surface of the well region, adjacent to sides of the gate.
2 . The non-volatile memory device of claim 1 , wherein the gate comprises doped polysilicon.
3 . The non-volatile memory device of claim 2 , wherein the doped polysilicon comprises first conductive type impurities.
4 . The non-volatile memory device of claim 2 , wherein the doped polysilicon comprises second conductive type impurities.
5 . The non-volatile memory device of claim 4 , wherein the first conductive type is n-type and the second conductive type is p-type.
6 . The non-volatile memory device of claim 4 , wherein the well region is in an upper portion of the deep well region.
7 . The non-volatile memory device of claim 1 , wherein the substrate comprises silicon containing second conductive type impurity ions.
8 . The non-volatile memory device of claim 1 , wherein the non-volatile memory device comprises a flash memory device.
9 . The non-volatile memory device of claim 1 , wherein the first conductive type is n-type and the second conductive type is p-type.
10 . A method of erasing a non-volatile memory device having a first conductive type deep well region in a semiconductor substrate, isolating a second conductive type well region having source/drain regions therein from the semiconductor substrate, the method comprising:
erasing first electrons by one of Hot Hole Injection or tunneling in a first step; and
erasing second electrons that are not erased in the first step by the other of gate-to-body tunneling manner in a second step.
11 . The method of claim 10 , comprising applying a negative voltage to a gate in the first step and maintaining the negative voltage into the third step.
12 . The method of claim 10 , comprising applying a positive voltage to the drain region during the first step and maintaining a floating state thereafter.
13 . The method of claim 10 , comprising applying a ground body bias in the first step, and in the second step, applying a positive body bias voltage.
14 . The method of claim 10 , further comprising a time gap between the first and second steps.
15 . The method of claim 14 , wherein the time gap comprises a period of time sufficient to prevent a body-to-drain diode from turning on when the first step ends and when the second step starts.
16 . The method of claim 10 , wherein Hot Hole Injection comprises gate-to-drain Hot Hole Injection.
17 . The method of claim 10 , wherein tunneling comprises gate-to-body tunneling.
18 . The method of claim 10 , wherein the first step comprises erasing by gate-to-body tunneling.
19 . The method of claim 10 , wherein the first step comprises erasing by gate-to-drain hot hole injection.