IP Library Granted Patent US 8,140,110
Granted Patent B2
US 8,140,110 · App. 11/199,560 · Granted Mar 20, 2012

Controlling input and output in a multi-mode wireless processing system

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Quick Facts
Patent No.
US 8,140,110
App. No.
11/199,560
Granted
Mar 20, 2012
Kind
B2
Abstract

A system and method of controlling input and output in a multi-mode wireless processing system. The method can include receiving an instruction for communication in a multi-mode wireless processing system; and determining from a field in the received instruction whether a designated processing unit generates output data or receives input data.

Claims (56)

1. A method of controlling input and output in a multi-mode wireless processing system, the method comprising:

receiving from a program memory an instruction for controlling an interface between an element external to a multi-mode wireless processing system and the multi-mode wireless processing system;

selecting, based on the instruction, a first processing unit from a plurality of processing units of the multi-mode wireless processing system, each of the plurality of processing units operable to perform a corresponding vector operation;

determining from a field in the received instruction whether the first processing unit generates output data or receives input data; and

determining from the field in the received instruction a general purpose output as a destination for the generated output data.

2. The method of claim 1 , wherein the received instruction indicates a rate of communication between the designated processing unit and the general purpose output.

3. The method of claim 1 , further comprising routing the generated output data from the designated processing unit to the destination.

4. A method of controlling input and output in a multi-mode wireless processing system, the method comprising:

receiving from a program memory an instruction for controlling an interface between an element external to a multi-mode wireless processing system and the multi-mode wireless processing system;

selecting, based on the instruction, a first processing unit from a plurality of processing units of the multi-mode wireless processing system, each of the plurality of processing units operable to perform a corresponding vector operation;

determining from a field in the received instruction whether the first processing unit generates output data or receives input data, wherein the received instruction indicates recording of a frame rate of errors.

5. A method of controlling input and output in a multi-mode wireless processing system, the method comprising:

receiving from a program memory an instruction for controlling an interface between an element external to a multi-mode wireless processing system and the multi-mode wireless processing system;

selecting, based on the instruction, a first processing unit from a plurality of processing units of the multi-mode wireless processing system, each of the plurality of processing units operable to perform a corresponding vector operation;

determining from a field in the received instruction whether the first processing unit generates output data or receives input data, wherein the received instruction indicates managing of sample buffers internal to the multi-mode wireless processing system.

6. A method of controlling input and output in a multi-mode wireless processing system, the method comprising:

receiving from a program memory an instruction for controlling an interface between an element external to a multi-mode wireless processing system and the multi-mode wireless processing system;

selecting, based on the instruction, a first processing unit from a plurality of processing units of the multi-mode wireless processing system, each of the plurality of processing units operable to perform a corresponding vector operation;

determining from a field in the received instruction whether the first processing unit generates output data or receives input data and determining from the field in the received instruction a general purpose input as a source of the input data, wherein the received instruction indicates a rate of communication between the designated processing unit and the general purpose input.

7. A system for controlling input and output in a multi-mode wireless processor, the system comprising:

a plurality of processing units, each of the plurality of processing units operable to perform a corresponding vector operation;

a memory including instructions in a multi-mode wireless processor system, the instructions controlling an interface between an element external to the multi-mode wireless processing system and the multi-mode wireless processing system; and

a controller coupled to the memory and operable to:

receive an instruction from the memory;

select a first processing unit of the plurality of processing units based on the instruction and determining based on a field of the instruction whether the first processing unit generates output data or receives input data;

determine from the instruction field a general purpose output as a destination for the generated output data.

8. The system of claim 7 , wherein the controller routes the output data from the designated processing unit to the destination.

9. The system of claim 7 , wherein the received instruction indicates a rate of communication between the designated processing unit and the general purpose output.

10. A system for controlling input and output in a multi-mode wireless processor, the system comprising:

a plurality of processing units, each of the plurality of processing units operable to perform a corresponding vector operation;

a memory including instructions in a multi-mode wireless processor system, the instructions controlling an interface between an element external to the multi-mode wireless processing system and the multi-mode wireless processing system; and

a controller coupled to the memory and operable to:

receive an instruction from the memory;

select a first processing unit of the plurality of processing units based on the instruction and determining based on a field of the instruction whether the first processing unit generates output data or receives input data;

wherein the received instruction indicates recording of a frame rate of errors.

11. A system for controlling input and output in a multi-mode wireless processor, the system comprising:

a plurality of processing units, each of the plurality of processing units operable to perform a corresponding vector operation;

a memory including instructions in a multi-mode wireless processor system, the instructions controlling an interface between an element external to the multi-mode wireless processing system and the multi-mode wireless processing system; and

a controller coupled to the memory and operable to:

receive an instruction from the memory;

select a first processing unit of the plurality of processing units based on the instruction and determining based on a field of the instruction whether the first processing unit generates output data or receives input data;

wherein the received instruction indicates managing of sample buffers internal to the multi-mode wireless processing system.

12. A system for controlling input and output in a multi-mode wireless processor, the system comprising:

a plurality of processing units, each of the plurality of processing units operable to perform a corresponding vector operation;

a memory including instructions in a multi-mode wireless processor system, the instructions controlling an interface between an element external to the multi-mode wireless processing system and the multi-mode wireless processing system; and

a controller coupled to the memory and operable to:

receive an instruction from the memory;

select a first processing unit of the plurality of processing units based on the instruction and determining based on a field of the instruction whether the first processing unit generates output data or receives input data;

determine from the instruction field a general purpose input as a source of the input data; and

route the input data from the source to the designated processing unit;

wherein the received instruction indicates a rate of communication between the designated processing unit and the general purpose input.

13. A method, comprising:

receiving an instruction for controlling an interface between an element external to a multi-mode wireless processing system and a multi-mode wireless processing system;

determining from a field in the received instruction whether a designated processing unit of the multimode wireless processing system generates output data or receives input data;

in response to determining the designated processing unit receives input data, determining based on the received instruction a general purpose input as a source of the input data; and

in response to determining the designated processing unit receives input data, determining a rate of communication between the designated processing unit and the general purpose input.

Assignments (30)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
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From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
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To: NXP B.V.
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CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
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MERGER Recorded Jan 3, 2017
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SECURITY AGREEMENT Recorded Mar 15, 2010
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ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 5, 2008
From: COMMASIC LLC
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ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 17, 2006
From: COHEN, LEWIS NEAL; WERNER, DANIEL THOMAS; MYERS, THEODORE JON; BOESEL, ROBERT W.
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