Patent Assignment
Reel/Frame 041144/0363
MERGER
Recorded: 2017-01-03
Received: 2017-01-26
Pages: 34
Assignor
FREESCALE SEMICONDUCTOR, INC.
Executed: 2016-11-07
Assignee
NXP USA, INC.
6501 WILLIAM CANNON DRIVE WEST, TX 30 OE:62, AUSTIN, TX, 78735, UNITED STATES
Covered Applications
(100)
SWITCHLESS SENSING FOR ELECTRONIC DEVICES USED WITH DETERRENT DEVICES
App. No. 15/383,796
→
SYSTEMS AND METHODS FOR TESTING PACKAGE ASSEMBLIES
App. No. 15/337,821
→
MICROELECTROMECHANICAL SYSTEMS DEVICE TEST SYSTEM AND METHOD
App. No. 15/336,035
→
THROUGH SUBSTRATE VIA (TSV) AND METHOD THEREFOR
App. No. 15/335,875
→
PACKAGE TO BOARD INTERCONNECT STRUCTURE WITH BUILT-IN REFERENCE PLANE STRUCTURE
App. No. 15/334,734
→
ELECTRONIC COMPONENT PACKAGE WITH HEATSINK AND MULTIPLE ELECTRONIC COMPONENTS
App. No. 15/333,580
→
DEVICE AND METHOD FOR SECURE DATA STORAGE
App. No. 15/298,086
→
SENSE AMPLIFIER CIRCUIT
App. No. 15/293,335
→
SEMICONDUCTOR DEVICE STRUCTURE WITH NON PLANAR SLIDE WALL
App. No. 15/286,988
→
INERTIAL SENSOR WITH MOTION LIMIT STRUCTURE
App. No. 15/286,348
→
SENSE AMPLIFIER CIRCUIT
App. No. 15/281,400
→
CALIBRATING INERTIAL NAVIGATION DATA USING TIRE PRESSURE MONITORING SYSTEM SIGNALS
App. No. 15/276,629
→
INTEGRATED CIRCUIT WITH PROTECTION FROM TRANSIENT ELECTRICAL STRESS EVENTS AND METHOD THEREFOR
App. No. 15/273,223
→
INTEGRATED CIRCUIT WITH PROTECTION FROM TRANSIENT ELECTRICAL STRESS EVENTS AND METHOD THEREFOR
App. No. 15/273,220
→
CMOS AND PRESSURE SENSOR INTEGRATED ON A CHIP AND FABRICATION METHOD
App. No. 15/271,627
→
CONTINUOUS-TIME CASCADED SIGMA-DELTA ANALOG-TO-DIGITAL CONVERTER
App. No. 15/267,356
→
MULTIPLE INTERCONNECTIONS BETWEEN DIE
App. No. 15/259,980
→
MASS STORAGE SYSTEM AND METHOD OF STORING MASS DATA
App. No. 15/256,594
→
ACTIVE TAMPER DETECTION CIRCUIT WITH BYPASS DETECTION AND METHOD THEREFOR
App. No. 15/250,644
→
SERIES-TYPE DOHERTY AMPLIFIER
App. No. 15/248,825
→
SYSTEM, TEST CHAMBER, AND METHOD FOR RESPONSE TIME MEASUREMENT OF A PRESSURE SENSOR
App. No. 15/246,097
→
SYSTEM AND METHOD FOR CHARACTERIZING CRITICAL PARAMETERS RESULTING FROM A SEMICONDUCTOR DEVICE FABRICATION PROCESS
App. No. 15/240,701
→
VIBRATION AND SHOCK ROBUST GYROSCOPE
App. No. 15/207,229
→
METHOD AND APPARATUS FOR DETERMINING FEASIBLITY OF MEMORY OPERATING CONDITION CHANGE USING DIFFERENT BACK BIAS VOLTAGES
App. No. 15/204,190
→
SOLID STATE MICROWAVE HEATING APPARATUS AND METHOD WITH STACKED DIELECTRIC RESONATOR ANTENNA ARRAY
App. No. 15/199,656
→
ELECTRONIC COMPONENT PACKAGE WITH MULTPLE ELECTRONIC COMPONENTS
App. No. 15/195,175
→
KERNEL BASED CLUSTER FAULT ANALYSIS
App. No. 15/181,649
→
SEMICONDUCTOR DEVICE PACKAGE AND METHODS OF MANUFACTURE THEREOF
App. No. 15/170,254
→
INTEGRATED CIRCUIT PACKAGE WITH SOLDER BALLS ON TWO SIDES
App. No. 15/165,511
→
MULTIPLE-PATH RF AMPLIFIERS WITH ANGULARLY OFFSET SIGNAL PATH DIRECTIONS, AND METHODS OF MANUFACTURE THEREOF
App. No. 15/157,025
→
CAPACITIVE SENSOR DEVICE AND METHOD OF OPERATION
App. No. 15/094,333
→
SEMICONDUCTOR DEVICES WITH AN ENHANCED RESISTIVITY REGION AND METHODS OF FABRICATION THEREFOR
App. No. 15/083,084
→
DELAY-LOCKED LOOP CIRCUIT WITH FRACTIONAL PHASE FREQUENCY DETECTOR
App. No. 15/058,121
→
VOLTAGE SAMPLING SWITCH AND METHOD THEREFOR
App. No. 15/003,917
→
PHASE-LOCKED LOOP WITH FREQUENCY BOUNDING CIRCUIT
App. No. 15/000,911
→
HARDWARE-BASED TIME ALIGNMENT OF WIRELESS LINKS
App. No. 14/989,805
→
EMITTER FOLLOWER BUFFER WITH REVERSE-BIAS PROTECTION
App. No. 14/899,130
→
DYNAMIC ANALOG TO DIGITAL CONVERTER (ADC) TRIGGERING
App. No. 14/966,643
→
Low Resistance Polysilicon Strap
App. No. 14/960,211
→
SYSTEM FOR PREVENTING TAMPERING WITH INTEGRATED CIRCUIT
App. No. 14/956,406
→
PHASE DETECTOR AND PHASE-LOCKED LOOP
App. No. 14/895,267
→
Sensor Protective Coating
App. No. 14/949,869
→
SYSTEM ON CHIP AND METHOD OF OPERATING A SYSTEM ON CHIP
App. No. 14/945,690
→
NON-VOLATILE MEMORY (NVM) CELL AND A METHOD OF MAKING
App. No. 14/943,175
→
SEMICONDUCTOR STRUCTURE HAVING A DUAL-GATE NON-VOLATILE MEMORY DEVICE AND METHODS FOR MAKING SAME
App. No. 14/925,933
→
PASSIVE EQUALIZER CAPABLE OF USE IN A RECEIVER
App. No. 14/918,963
→
OPEN LOOP BAND GAP REFERENCE VOLTAGE GENERATOR
App. No. 14/881,176
→
DIGITAL FRONT-END CHANNELIZATION DEVICE
App. No. 14/880,738
→
METHODS AND STRUCTURES FOR DYNAMICALLY REDUCING DC OFFSET
App. No. 14/864,607
→
DECODER
App. No. 14/860,874
→
SEMICONDUCTOR DEVICE AND DRIVER CIRCUIT WITH DRAIN AND ISOLATION STRUCTURE INTERCONNECTED THROUGH A DIODE CIRCUIT, AND METHOD OF MANUFACTURE THEREOF
App. No. 14/846,115
→
Method of Forming Different Voltage Devices with High-K Metal Gate
App. No. 14/843,364
→
SIGNAL BOND WIRE SHIELD
App. No. 14/842,816
→
CLOCK MULTIPLEXER FOR GENERATING GLITCH-FREE CLOCK SIGNAL
App. No. 14/835,738
→
CONTENT ADDRESSABLE MEMORY WITH SEARCH LINE TEST CIRCUITRY
App. No. 14/835,322
→
SINGLE CAPACITOR, CONTROLLED OUTPUT, INVERTER BASED POSITIVE/NEGATIVE CHARGE PUMP
App. No. 14/835,570
→
LEAD FRAME WITH POWER AND GROUND BARS
App. No. 14/833,135
→
BUFFER CIRCUIT FOR VOLTAGE CONTROLLED OSCILLATOR
App. No. 14/833,122
→
METHODS AND STRUCTURES FOR MULTIPORT MEMORY DEVICES
App. No. 14/826,522
→
APPARATUS AND METHOD FOR MONITORING ELECTRICAL CURRENT
App. No. 14/766,762
→
INTEGRATED CIRCUIT WITH MULTIPLEXED I/O PADS
App. No. 14/821,776
→
METHODS OF MANUFACTURING AND OPERATING DIE-TO-DIE INDUCTIVE COMMUNICATION DEVICES
App. No. 14/812,242
→
POWER MANAGEMENT CONTROLLER FOR INTEGRATED CIRCUIT
App. No. 14/810,460
→
ZENER DIODE DEVICES AND RELATED FABRICATION METHODS
App. No. 14/810,140
→
SCANNABLE FLIP-FLOP AND LOW POWER SCAN-SHIFT MODE OPERATION IN A DATA PROCESSING SYSTEM
App. No. 14/799,903
→
SYSTEMS AND METHODS FOR DRIVING A CONTROL GATE WITH A SELECT GATE SIGNAL IN A SPLIT-GATE NONVOLATILE MEMORY CELL
App. No. 14/734,736
→
PROTECTED SENSOR FIELD EFFECT TRANSISTORS
App. No. 14/731,795
→
SYSTEM FOR RECOVERING UNRESPONSIVE COMMON PUBLIC RADIO INTERFACE (CPRI) NODES
App. No. 14/724,738
→
MECHANISM FOR DATA GENERATION IN DATA PROCESSING SYSTEMS
App. No. 14/718,407
→
METHOD AND SYSTEM TO IMPROVE SOFT-PROGRAMMING TIME IN NON-VOLATILE MEMORY
App. No. 14/717,153
→
DATA STROBE SIGNAL GENERATION FOR FLASH MEMORY
App. No. 14/715,544
→
SYSTEM FOR ISOLATING INTEGRATED CIRCUIT POWER DOMAINS
App. No. 14/714,333
→
HIGH-SPEED FLYING-CAP LEVEL SHIFTER
App. No. 14/714,341
→
RADIO FREQUENCY RECEIVER CAPABLE OF DETERMINING A NOISE ESTIMATE IN CASE OF RECEIVED POWER UNBALANCED ANTENNAS AND METHOD OF OPERATING THEREOF
App. No. 14/710,828
→
SYSTEM ON CHIP
App. No. 14/442,241
→
METHODS FOR FORMING CONTACT LANDING REGIONS IN SPLIT-GATE NON-VOLATILE MEMORY (NVM) CELL ARRAYS
App. No. 14/706,130
→
SYSTEM FOR STEERING DATA PACKETS IN COMMUNICATION NETWORK
App. No. 14/704,988
→
CLOCK GENERATOR CIRCUIT
App. No. 14/702,776
→
DRIVER CIRCUIT RECEIVING A REGULATED PRE-DRIVER SUPPLY VOLTAGE
App. No. 14/700,250
→
HIGH VOLTAGE DIODE
App. No. 14/697,195
→
MICROELECTROMECHANICAL SYSTEM DEVICES HAVING THROUGH SUBSTRATE VIAS AND METHODS FOR THE FABRICATION THEREOF
App. No. 14/694,908
→
MAXIMUM LIKELIHOOD DECODING APPARATUS
App. No. 14/691,620
→
CELL SEARCH IN A WIRELESS COMMUNICATION NETWORK
App. No. 14/685,752
→
FREQUENCY HOPPING RADIO SYSTEM
App. No. 14/435,204
→
MISMATCH-COMPENSATED SENSE AMPLIFIER FOR HIGHLY SCALED TECHNOLOGY
App. No. 14/682,475
→
SYSTEM FOR ALIGNMENT OF RF SIGNALS
App. No. 14/681,047
→
MICROELECTRONIC ASSEMBLY HAVING A HEAT SPREADER FOR A PLURALITY OF DIE
App. No. 14/678,352
→
SYSTEM FOR VERIFYING TIMING CONSTRAINTS OF IC DESIGN
App. No. 14/675,752
→
EMBEDDED NVM IN A HKMG PROCESS
App. No. 14/661,729
→
METHOD OF FORMING SUPRA LOW THRESHOLD DEVICES
App. No. 14/656,844
→
DIGITAL-TO-ANALOG CONVERTER CIRCUIT
App. No. 14/644,941
→
VITERBI DECODING DEVICE AND METHOD FOR DECODING A SIGNAL PRODUCED BY A CONVOLUTIONAL ENCODER
App. No. 14/427,029
→
MULTIPLEXER CIRCUIT
App. No. 14/642,768
→
PRODUCTION-TEST DIE TEMPERATURE MEASUREMENT METHOD AND APPARATUS
App. No. 14/641,037
→
DELAY COMPENSATION CIRCUIT
App. No. 14/639,795
→
VOLTAGE SWITCHING SYSTEM FOR INTEGRATED CIRCUIT
App. No. 14/635,891
→
SYSTEMS AND METHODS FOR IMPROVING DATA RESTORE OVERHEAD IN MULTI-TASKING ENVIRONMENTS
App. No. 14/632,568
→
RECEIVER UNIT AND METHOD FOR CORRECTING A VALUE OF A RECEIVE SIGNAL STRENGTH INDICATOR
App. No. 14/423,724
→
METHOD OF GROUPING EMBEDDED MEMORIES FOR TESTING
App. No. 14/630,588
→
SINGLE CAPACITOR, LOW LEAKAGE CHARGE PUMP
App. No. 14/624,587
→