Package to board interconnect structure with built-in reference plane structure

1. An interconnect structure comprising:

a reference plane structure having a first major surface and a second major surface opposite the first major surface, the reference plane structure including a plurality of through holes from the first major surface to the second major surface;

a plurality of conductive columns, each conductive column positioned within a through hole;

a plurality of isolation structures, each isolation structure fills an annular region within the through hole between each conductive column and surrounding portion of the reference plane structure; and

a solder mask over at least a portion of the first major surface of the reference plane structure, wherein

the solder mask comprises a first plurality of openings, each of the first plurality of openings aligned to a top surface of each conductive column to define first electrical contact areas for the conductive columns, and

the solder mask further comprises a second plurality of openings, each of the second plurality of openings positioned over a portion of the first major surface of the reference plane structure to define second electrical contact areas for the reference plane structure.

2. The interconnect structure of claim 1 , wherein

each isolation structure comprises dielectric material, each isolation structure having a first ring-shaped portion that extends over a portion of the first major surface of the reference plane structure around the through hole, and having a second ring-shaped portion that extends over a portion of the second major surface of the reference plane structure around the through hole.

3. The interconnect structure of claim 1 , wherein

a top surface of each isolation structure extends beyond the first major surface and a bottom surface of each isolation structure extends beyond the second major surface, and

a top surface of each conductive column is coplanar with the top surface of each isolation structure and a bottom surface of each conductive column is coplanar with the bottom surface of each isolation structure.

4. The interconnect structure of claim 1 , wherein

a top surface of each isolation structure is coplanar with the first major surface and a bottom surface of each isolation structure is coplanar with the second major surface, and

a top surface of each conductive column is coplanar with the first major surface and a bottom surface of each conductive column is coplanar with the second major surface.

5. The interconnect structure of claim 1 , further comprising:

solder material on each top surface and bottom surface of each conductive column.

6. The interconnect structure of claim 1 , further comprising:

solder material over at least a portion of the first major surface of the reference plane structure and around each isolation structure.

7. The interconnect structure of claim 1 , further comprising:

a portion of conductive material positioned at each end of each conductive column, the portion of conductive material having a width that is larger than a width of the conductive column to provide an extended electrical contact area for each end of each conductive column.

8. The interconnect structure of claim 1 , further comprising:

at least a first portion and a second portion of conductive material respectively positioned over the first and second major surfaces of the reference plane structure between each isolation structure to provide extended electrical contact areas for the reference plane structure.

9. The interconnect structure of claim 1 , further comprising:

a layer of conductive material within each of the first and second plurality of openings.

10. The interconnect structure of claim 1 , further comprising:

dielectric material over each minor surface of the reference plane structure, each minor surface being perpendicular to the first and second major surfaces.

11. The interconnect structure of claim 1 , wherein

the reference plane structure comprises a copper sheet including the plurality of through holes.

12. The interconnect structure of claim 1 , wherein

the plurality of conductive columns comprises at least one of a group including copper and solder.

13. The interconnect structure of claim 1 , wherein

the interconnect structure is located between a package substrate and a printed circuit board (PCB), each conductive column forms an interconnect between a respective signal pad of the package substrate and a respective signal pad of the PCB.

14. The interconnect structure of claim 13 , wherein

the interconnect structure further comprises at least one interconnect formed through a portion of the reference plane structure between a respective ground pad of the package substrate and a respective ground pad of the PCB.

15. The interconnect structure of claim 1 , further comprising:

a first dielectric material layer over at least a portion of the first major surface of the reference plane structure and a second dielectric material layer over at least a portion of the second major surface of the reference plane structure, wherein

the first and second electrical contact areas are exposed through openings in the first dielectric material layer, and

third electrical contact areas for the conductive columns and fourth electrical contact areas for the reference plane structure are exposed through openings in the second dielectric material layer.

16. The interconnect structure of claim 15 , wherein

the first and second dielectric material layers comprise a B-stage dielectric material.

17. The interconnect structure of claim 1 , further comprising:

a second solder mask over at least a portion of the second major surface of the reference plane structure, wherein

the second solder mask comprises a third plurality of openings, each of the third plurality of openings aligned to a bottom surface of each conductive column to define third electrical contact areas for the conductive columns, and

the second solder mask further comprises a fourth plurality of openings, each of the fourth plurality of openings positioned over a portion of the second major surface of the reference plane structure to define fourth electrical contact areas for the reference plane structure.

18. The interconnect structure of claim 17 , wherein

the interconnect structure is located between a package substrate and a printed circuit board (PCB),

the first electrical contact areas on the first major surface are joined to respective signal pads of the package substrate,

the second electrical contact areas on the first major surface are joined to respective ground pads of the package substrate,

the third electrical contact areas on the second major surface are joined to respective signal pads of the PCB, and

the fourth electrical contact areas on the second major surface are joined to respective ground pads of the PCB.

19. The interconnect structure of claim 15 , wherein

at least a portion of the first dielectric material layer is between the first major surface of the reference plane structure and the solder mask.