IP Library Granted Patent US 7,439,183
Granted Patent B2
US 7,439,183 · App. 11/211,708 · Granted Oct 21, 2008

Method of manufacturing a semiconductor device, and a semiconductor substrate

Assignees: Kabushiki Kaisha Toshiba; Seiko Epson Corporation
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Quick Facts
Patent No.
US 7,439,183
App. No.
11/211,708
Granted
Oct 21, 2008
Kind
B2
Abstract

A method of manufacturing a semiconductor device. In the method, a thin film is formed on an Si substrate having face orientation ( 100 ), that part of the thin film, which lies on an element-isolating region, is removed. Then, the Si substrate is subjected to selective etching, making a trench in the substrate to isolate an element, by using the thin film as mask and a mixture solution of hydrofluoric acid and ozone water.

Claims (23)

1. A method of manufacturing a semiconductor device, comprising:

forming a thin film on a major surface of a Si substrate, the major surface having face orientation ( 100 );

removing a part of the thin film which lies on an element-isolating region; and

selectively etching the Si substrate by using the thin film as a mask and applying a mixture solution containing hydrofluoric acid and ozone water to the Si substrate,

wherein the Si substrate undergoes selective anisotropic etching until a ( 110 ) face is exposed at sides of the Si substrate, thereby forming an element-isolating trench in the Si substrate having no side-etched parts.

2. The method according to claim 1 , wherein the thin film is an oxide film formed by thermally oxidizing the Si substrate.

3. The method according to claim 2 , wherein the oxide film is etched at a rate lower than the Si substrate when the Si substrate is etched, and has such a thickness as to be etched away when etching of the Si substrate is completed.

4. The method according to claim 1 , wherein hydrofluoric acid and ozone water have concentration of 0.05 to 2 wt % and concentration of 3 to 20 ppm, respectively, in the mixture solution.

5. The method according to claim 1 , wherein a resist pattern is formed on the thin film in order to remove that part of the thin film which lies on an element-isolating region, selective etching is performed on the thin film by using the resist pattern as mask, and the resist pattern is removed after the selective etching is performed.

6. A method of manufacturing a semiconductor device, comprising:

forming a thin film on a major surface of a Si substrate, the major surface having face orientation ( 100 );

removing a part of the thin film which lies on that region of the Si substrate at which an effective major-surface area is to be increased; and

selectively etching the Si substrate by using the thin film as a mask and applying a mixture solution containing hydrofluoric acid and ozone water to the Si substrate,

wherein the Si substrate undergoes selective anisotropic etching until a ( 110 ) face is exposed at sides of the Si substrate, thereby increasing an effective major-surface area of the Si substrate.

7. The method according to claim 6 , wherein the thin film is an oxide film formed by thermally oxidizing the Si substrate.

8. The method according to claim 7 , wherein the oxide film is etched at a rate lower than the Si substrate when the Si substrate is etched, and has such a thickness as to be etched away when etching of the Si substrate is completed.

9. The method according to claim 6 , wherein hydrofluoric acid and ozone water have concentration of 0.05 to 2 wt % and concentration of 3 to 20 ppm, respectively, in the mixture solution.

10. The method according to claim 6 , wherein a resist pattern is formed on the thin film in order to remove that part of the thin film which lies on that part of the Si substrate at which the effective major-surface area is to be increased, selective etching is performed on the thin film by using the resist pattern as mask, and the resist pattern is removed after the selective etching is performed.

11. The method according to claim 6 , wherein the thin film is removed in part, thereby forming a line-opening pattern.

12. The method according to claim 6 , wherein the thin film is removed in part, thereby forming a line-and-space pattern.

13. The method according to claim 6 , further comprising:

forming a capacitor-insulating film on the major surface of the substrate that has the effective major-surface area increased; and forming a capacitor electrode on the capacitor-insulating film.

14. The method according to claim 6 , further comprising: forming a gate-insulating film on the major surface of the substrate that has the effective major-surface area increased; and forming a gate electrode on the gate-insulating film.

Assignments (5)
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2020
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 051665/0776 →
CHANGE OF NAME AND ADDRESS Recorded Jan 21, 2020
From: K.K. PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 051652/0240 →
MERGER Recorded Jan 17, 2020
From: TOSHIBA MEMORY CORPORATION
To: K.K. PANGEA
Reel/Frame 051546/0774 →
DEMERGER Recorded Jan 16, 2020
From: KABUSHIKI KAISHA TOSHBA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 051619/0829 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 26, 2005
From: MIYAZAKI, KUNIHIRO; MATSUO, HIROYUKI; NAKAJIMA, TOSHIKI
To: KABUSHIKI KAISHA TOSHIBA; SEIKO EPSON CORPORATION
Reel/Frame 016917/0001 →
Priority Claims (1)
JP 2004-248957 · Aug 27, 2004 · national
Continuity (1)
Related Publication 20060046487A1 · Mar 2, 2006