Method for manufacturing a semiconductor device
An increase in parasitic capacitance between lines, an increase of contact resistance, and corrosion of a metal line may be effectively reduced or prevented when a semiconductor device is manufactured by a method including forming an interlayer insulating layer including a low-k dielectric material on a semiconductor substrate having a structure thereon, etching the interlayer insulating layer to form a hole and expose a portion of the structure, and cleaning the hole using an inorganic cleaning agent.
1 . A method of manufacturing a semiconductor device, comprising:
forming an interlayer insulating layer comprising a low-k dielectric material on a semiconductor substrate having a structure thereon;
forming a hole in the interlayer insulating layer by etching the interlayer insulating layer such that the structure is partially exposed therethrough; and
cleaning the hole with an inorganic cleaning agent.
2 . The method of claim 1 , wherein the inorganic cleaning agent comprises hydrogen fluoride (HF) vapor.
3 . The method of claim 2 , wherein the interlayer insulating layer further comprises an etch stop layer under the low-k dielectric material, and forming the hole comprises:
forming a via hole exposing the etch stop layer by etching the low-k dielectric material;
partially removing the interlayer insulating layer to form a trench overlapping with at least part of the via hole; and
removing the etch stop layer exposed through the via hole.
4 . The method of claim 2 , further comprising forming the HF vapor by flowing nitrogen (N 2 ) gas through a HF solution in a container.
5 . The method of claim 4 , wherein the HF solution has a concentration of from about 35% by weight to about 48% by weight.
6 . The method of claim 4 , wherein the HF solution has a concentration of about 39.5% by weight.
7 . The method of claim 4 , wherein the nitrogen gas has a temperature of from about 100° C. to about 250° C.
8 . The method of claim 4 , wherein the nitrogen gas has a temperature of about 180° C.
9 . The method of claim 2 , wherein the HF vapor has a temperature of 40-90° C.
10 . The method of claim 2 , wherein the substrate has a temperature of 70-80° C.
11 . The method of claim 1 , further comprising filling an upper metal line in the hole, wherein:
the structure comprises a lower metal line; and
the upper metal line connects with the lower metal line through the hole.
12 . The method of claim 11 , wherein the lower metal line and upper metal line comprise copper.
13 . The method of claim 1 , comprising a damascene structure including the hole and a trench.
14 . The method of claim 1 , wherein the low-k dielectric material includes a silicon oxycarbide-(SiOC) based material.
15 . The method of claim 1 , wherein cleaning the hole, comprises cleaning the substrate having the hole with a solution comprising deionized water and a 49% HF solution.
16 . The method of claim 15 , wherein the HF solution and the deionized water are present in a ratio of 0.1-10 parts by weight of the HF solution and 600-1200 parts by weight of the deionized water.
17 . The method of claim 15 , wherein the cleaning step is performed in a single wafer cleaner.
18 . The method of claim 15 , wherein the cleaning is conducted at a temperature of from 30 to 60° C.
19 . The method of claim 15 , wherein the cleaning further comprises rotating the substrate at a rotation speed of from 500 to 1000 rpm, and injecting the cleaning solution at a flow rate of from 1 to 1.5 liters per minute.