IP Library Granted Patent US 7,095,260
Granted Patent B2
US 7,095,260 · App. 11/217,459 · Granted Aug 22, 2006

Spread spectrum clock generation circuit, jitter generation circuit and semiconductor device

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,095,260
App. No.
11/217,459
Granted
Aug 22, 2006
Kind
B2
Abstract

A spread spectrum clock generation circuit capable of further reducing the electromagnetic wave radiation with a simple configuration has been disclosed and, particularly in a spread spectrum clock generation circuit using a current control oscillator (ICO), a differential signal to which a spread spectrum modulation signal, the period or amplitude of which changes, is added is generated, and the differential signal is applied to the ICO and a clock is generated.

Claims (7)

1. A spread spectrum clock generation circuit comprising a frequency phase comparator for detecting a difference in phase between a reference clock and a generated clock, a charge pump for generating a charge/discharge signal in accordance with the difference in phase detected by the frequency phase comparator, a loop-filter for generating a differential voltage signal in accordance with the charge signal, a voltage-current conversion circuit for converting the differential voltage signal into a differential current signal, and a clock generator for generating a generated clock with a frequency in accordance with the differential current signal, wherein a spread spectrum modulation circuit for generating a spread spectrum modulation signal by modulating the differential current signal and an amplifier circuit for amplifying the spread spectrum modulation signal are comprised and the amplified spread spectrum modulation signal is added to the differential current signal and applied to the clock generator.

2. A spread spectrum clock generation circuit comprising a frequency phase comparator for detecting a difference in phase between a reference clock and a generated clock, a charge pump for generating a charge/discharge signal in accordance with the difference in phase detected by the frequency phase comparator, a loop-filter for generating a differential voltage signal in accordance with the charge signal, a voltage-current conversion circuit for converting the differential voltage signal into a differential current signal, and a clock generator for generating a generated clock with a frequency in accordance with the differential current signal, wherein an amplifier circuit for amplifying the differential current signal and a spread spectrum modulation circuit for generating a spread spectrum modulation signal by modulating the amplified differential current signal are comprised and the spread spectrum modulation signal is added to the differential current signal and applied to the clock generator.

3. A spread spectrum clock generation circuit, as set forth in claim 1 , wherein the spread spectrum modulation circuit comprises a digital control circuit for generating an output code which changes continuously between the maximum value and the minimum value and a current digital-to-analog conversion circuit for changing an input current signal in accordance with the output code.

4. A spread spectrum clock generation circuit, as set forth in claim 1 , wherein the amplifier circuit comprises a digital control circuit, for generating a constant output code, and a current digital-to-analog conversion circuit, for changing an input current signal to a current in accordance with the output code.

5. A spread spectrum clock generation circuit, as set forth in claim 3 , wherein the current digital-to-analog conversion circuit is a circuit comprising a transistor train each of which generates a current in accordance with the input current with a weighting ratio corresponding to the output code and outputs an output current to which the current output from the transistor train is added, and the output of the current of each transistor of the transistor train is changed to a current in accordance with the output code by the control in accordance with the output code.

6. A spread spectrum clock generation circuit, as set forth in claim 3 , wherein the digital control circuit comprises a plurality of dividers with a different dividing ratio with which a clock is divided, a switch controller for selecting the output of the plurality of dividers in order, an up/down counter for counting the selected dividing clock, and a counter for switching between the up operation and the down operation of the up/down counter for each predetermined count number by counting the dividing clock.

7. A spread spectrum clock generation circuit, as set forth in claim 3 , wherein the digital control circuit is a computer system controlled by programs.

Assignments (6)
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 14, 2016
From: CYPRESS SEMICONDUCTOR CORPORATION
To: MONTEREY RESEARCH, LLC
Reel/Frame 040911/0238 →
PARTIAL RELEASE OF SECURITY INTEREST IN PATENTS Recorded Aug 11, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 039708/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 30, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036039/0001 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 11, 2013
From: FUJITSU SEMICONDUCTOR LIMITED
To: SPANSION LLC
Reel/Frame 031205/0461 →