IP Library Granted Patent US 7,102,548
Granted Patent B1
US 7,102,548 · App. 11/219,415 · Granted Sep 5, 2006

Cascaded integrator comb filter with arbitrary integer decimation value and scaling for unity gain

Assignee: Quickfilter Technologies, Inc.
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,102,548
App. No.
11/219,415
Granted
Sep 5, 2006
Kind
B1
Abstract

We disclose a CIC digital filter having an arbitrary-integer decimation rate. The filter has a shifter connected to its input. The shifter receives a shift control input, where the shift control input is pre-computed as equal to the integer portion of 2 raised to the base-2 logarithm of the gain of the CIC filter. There is a multiplier connected between the input and the shifter. In other embodiments, the multiplier could be connected between the input and the shifter. Sequentially-connected integrator functions are connected to the shifter (or multiplier); a decimation function receives input from the integrator functions; and sequentially-connected differentiator functions receive input from the decimation function. The decimation function has a selectable rate equal to any integer between 1 and a number equal to the predetermined maximum decimation value. The multiplier is configured to compute the product of each input data sample by a correction factor; the correction factor being pre-computed as equal to the fractional portion of 2 raised to the base-2 logarithm of the gain of the CIC filter, so as to correct the gain of the CIC filter for decimation values not a power of 2.

Claims (93)

1. A CIC digital filter for filtering input data samples, comprising:

at least one integrator function;

a decimation function receiving input from the integrator function;

at least one differentiator function receiving input from the decimation function;

a multiplier connected between the input and the integrator function;

a shifter connected to output of the multiplier; and,

the multiplier configured to compute the product of each input data sample by a correction factor, so as to correct the gain of the CIC filter for decimation values not a power of 2.

2. The CIC filter of claim 1 , where the correction factor is pre-computed as equal to the fractional portion of 2 raised to the base-2 logarithm of the gain of the CIC filter.

3. The CIC filter of claim 1 , further comprising the shifter receiving a shift control input; the shift control input being pre-computed as equal to the integer portion of 2 raised to the base-2 logarithm of the gain of the CIC filter.

4. The CIC filter of claim 1 , comprising four sequentially-connected integrator functions and four sequentially-connected differentiator functions.

5. The CIC filter of claim 1 , where the decimation function operates at any decimation rate from 1 to 131,072.

6. A CIC digital filter for filtering input data samples; the filter having an input for data samples; the filter comprising:

a shifter connected to the input; the shifter receiving a shift control input; the shift control input being pre-computed as equal to the integer portion of 2 raised to the base-2 logarithm of the gain of the CIC filter;

a multiplier connected between the input and the shifter;

at least four sequentially-connected integrator functions connected to the shifter;

a decimation function receiving input from the integrator functions;

at least four sequentially-connected differentiator functions receiving input from the decimation function; the decimation function having a selectable rate equal to any integer between 1 and a number equal to the predetermined maximum decimation value; and,

the multiplier configured to compute the product of each input data sample by a correction factor; the correction factor being pre-computed as equal to the fractional portion of 2 raised to the base-2 logarithm of the gain of the CIC filter, so as to correct the gain of the CIC filter for decimation values not a power of 2.

7. A method of implementing a CIC filter having an input, an output, a shifter, a shift control, a multiplier, one or more integrator functions, a decimation function, and one or more differentiator functions, the method comprising:

receiving an input stream of data samples;

shifting each data sample by a left shift equal to the integer portion of the base-2 logarithm of the CIC filter gain;

multiplying each so shifted data sample by the fractional portion of the base-2 logarithm of the CIC filter gain;

integrating the shifted and multiplied data sample at least once;

decimating the data sample by a pre-determined decimation rate;

differentiating the decimated data sample at least once; and,

rounding the differentiated data sample to a pre-determined number of bits before outputting the data sample.

8. The method of claim 7 where the data sample is integrated a plurality of times.

9. The method of claim 7 where the data sample is differentiated a plurality of times.

10. The method of claim 7 where the decimation rate is an arbitrary integer between 1 and a number equal to a predetermined maximum decimation value.

11. An integrated circuit for performing a CIC digital filter function; the integrated circuit comprising:

at least one integrator;

a decimator; the decimator receiving input from the integrator;

at least one differentiator receiving input from the decimator;

a multiplier connected to the input;

a shifter connected between the output of the multiplier and to the integrator; and,

the multiplier configured to compute the product of each input data sample by a correction factor, so as to correct the gain of the CIC filter for decimation values not a power of 2.

12. The integrated circuit of claim 11 , where the correction factor is pre-computed as equal to the fractional portion of 2 raised to the base-2 logarithm of the gain of the CIC filter.

13. The integrated circuit of claim 11 , further comprising the shifter receiving a shift control input; the shift control input being pre-computed as equal to the integer portion of 2 raised to the base-2 logarithm of the gain of the CIC filter.

14. The integrated circuit of claim 11 , comprising four sequentially-connected integrators and four sequentially-connected differentiators.

15. The integrated circuit of claim 11 , where the decimator operates at any decimation rate from 1 to a predetermined maximum decimation value.

16. An integrated circuit for performing a CIC digital filter function for filtering input data samples, comprising:

a shifter; the shifter connected to the input; the shifter receiving a shift control input; the shift control input being pre-computed as equal to the integer portion of 2 raised to the base-2 logarithm of the gain of the CIC filter;

a multiplier connected to the shifter;

at least four sequentially-connected integrators connected to the multiplier;

a decimator receiving input from the integrators;

at least four sequentially-connected differentiators receiving input from the decimator; the decimator having a selectable rate equal to any integer between 1 and a number equal to a predetermined maximum decimation value; and,

the multiplier configured to compute the product of each input data sample by a correction factor; the correction factor being pre-computed as equal to the fractional portion of 2 raised to the base-2 logarithm of the gain of the CIC filter, so as to correct the gain of the CIC filter for decimation values not a power of 2.

17. A multi-channel CIC digital filter for filtering input data samples from a multiplexed data stream, comprising:

a multiplier connected to the input;

a shifter connected to the multiplier;

a demultiplexer connected to the shifter for demultiplexing the multiplexed data stream into two or more data streams;

where each demultiplexed data stream is input to:

at least one integrator function;

a decimation function receiving input from the integrator function;

at least one differentiator function receiving input from the decimation function;

the multiplier and shifter configured to compute the product of the input data samples by a correction factor, so as to correct the gain of the multi-channel CIC filter for decimation values not a power of two.

18. The multi-channel CIC filter of claim 17 , where the correction factor is pre-computed as equal to the fractional portion of 2 raised to the base-2 logarithm of the gain of the CIC filter.

19. The multi-channel CIC filter of claim 17 , further comprising the shifter receiving a shift control input; the shift control input being pre-computed as equal to the integer portion of 2 raised to the base-2 logarithm of the gain of the CIC filter.

20. The multi-channel CIC filter of claim 17 , where each channel comprises four sequentially-connected integrator functions and four sequentially-connected differentiator functions.

21. The CIC filter of claim 17 , where the decimator operates at any decimation rate from 1 to 131,072.

22. A method of implementing a multi-channel CIC filter for filtering input data samples from a multiple data stream; the multi-channel CIC filter having an input, an output, a shifter, a shift control, a multiplier, a demultiplexer, and a plurality of channels; each channel having one or more integrator functions, a decimation function, and one or more differentiator functions, the method comprising:

receiving an input stream of multiplexed data samples;

shifting each data sample by a left shift equal to the integer portion of the base-2 logarithm of the CIC filter gain;

multiplying each so shifted data sample by the fractional portion of the base-2 logarithm of the CIC filter gain;

demultiplexing the multiplexed data stream into two or more data streams;

for each data stream:

integrating the shifted and multiplied data sample at least once;

decimating the data sample by a pre-determined decimation rate;

differentiating the decimated data sample at least once; and,

rounding the differentiated data sample to a pre-determined number of bits before outputting the data sample.

23. The method of claim 22 where each data sample is integrated a plurality of times.

24. The method of claim 22 where each data sample is differentiated a plurality of times.

25. The method of claim 22 where the decimation rate is an arbitrary integer between 1 and a number equal to a predetermined maximum decimation value.

26. An integrated circuit for performing a multi-channel CIC digital filter function on a multiplexed stream of data samples; the integrated circuit comprising:

a multiplier connected to the input;

a shifter connected to the multiplier;

a demultiplexer connected to the shifter for demultiplexing the multiplexed data stream into two or more channels, each channel comprising a demultiplexed data stream;

where each channel further comprises:

at least one integrator;

a decimator; the decimator receiving input from the integrator;

at least one differentiator receiving input from the decimator; and, the multiplier and shifter configured to compute the product of each input data sample by a correction factor, so as to correct the gain of the CIC filter for decimation values not a power of 2.

27. The integrated circuit of claim 26 , where the correction factor is pre-computed as equal to the fractional portion of 2 raised to the base-2 logarithm of the gain of the multi-channel CIC filter.

28. The integrated circuit of claim 26 , further comprising the shifter receiving a shift control input; the shift control input being pre-computed as equal to the integer portion of 2 raised to the base-2 logarithm of the gain of the multi-channel CIC filter.

29. The integrated circuit of claim 26 , where each channel comprises four sequentially-connected integrators and four sequentially-connected differentiators.

30. The integrated circuit of claim 26 , where each decimator operates at any decimation rate from 1 to a predetermined maximum decimation value.

31. An integrated circuit for performing a multi-channel CIC digital filter function on a multiplexed stream of data samples, comprising:

a multiplier connected to the input; the multiplier configured to compute the product of each input data sample by a correction factor; the correction factor being pre-computed as equal to the fractional portion of 2 raised to the base-2 logarithm of the gain of the CIC filter, so as to correct the gain of the CIC filter for decimation values not a power of 2; and,

a shifter connected to the multiplier; the shifter receiving a shift control input; the shift control input being pre-computed as equal to the integer portion of 2 raised to the base-2 logarithm of the gain of the CIC filter;

a demultiplexer connected to the shifter for demultiplexing the multiplexed data stream into two or more channels; where each channel comprises a demultiplexed data stream;

where each channel further comprises:

at least four sequentially-connected integrators;

a decimator receiving input from the integrators;

at least four sequentially-connected differentiators receiving input from the decimator; the decimator having a selectable rate equal to any integer between 1 and a number equal to a predetermined maximum decimation value.

Assignments (10)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 5, 2014
From: QUICKFILTER TECHNOLOGIES, LLC
To: GLAST, PHILLIPS & MURRAY, P.C.
Reel/Frame 032145/0278 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 5, 2014
From: GLAST, PHILLIPS & MURRAY, P.C.
To: THOMAS, JOHN A.; MILLER, FRED
Reel/Frame 032146/0530 →
RELEASE OF SECURITY INTEREST Recorded Feb 21, 2013
From: ARGONAUT 10 LLC
To: QUICKFILTER TECHNOLOGIES
Reel/Frame 029850/0992 →
SECURITY AGREEMENT Recorded Apr 30, 2009
From: QUICKFILTER TECHNOLOGIES LLC
To: SPINNAKER CAPITAL LLC SECURITY HOLDING AS NOMINEE FOR ARGONAUT 10 LLC; STAIANO, EDWARD
Reel/Frame 022618/0158 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 6, 2009
From: QUICKFILTER TECHNOLOGIES INC.
To: QUICKFILTER TECHNOLOGIES, LLC
Reel/Frame 022494/0917 →
SECURITY AGREEMENT Recorded Nov 20, 2008
From: QUICKFILTER TECHNOLOGIES, INC.
To: SPINNAKER CAPITAL LLC SECURITY HOLDING AS NOMINEE FOR ARGONAUT 10 LLC; STAIANO, EDWARD
Reel/Frame 021867/0900 →
RELEASE OF SECURITY INTEREST Recorded Dec 17, 2007
From: ARGONAUT 10 LLC; SORRENTO INVESTMENT GROUP, LLC
To: QUICKFILTER TECHNOLOGIES, INC.
Reel/Frame 020403/0473 →
SECURITY AGREEMENT Recorded Dec 14, 2006
From: QUICKFILTER TECHNOLOGIES, INC.
To: ARGONAUT 10 LLC; SORRENTO INVESTMENT GROUP, LLC
Reel/Frame 018635/0022 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 21, 2005
From: WANG, SHENQ-HUEY; ELLIOTT, WILLIAM D.
To: QUICKFILTER TECHNOLOGIES, INC.
Reel/Frame 017222/0269 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 21, 2005
From: MENG, XIEMEI
To: QUICKFILTER TECHNOLOGIES, INC.
Reel/Frame 017248/0767 →