Reconfigurable processor element utilizing both coarse and fine grained reconfigurable elements
View Patent ↗A reconfigurable processor element incorporating both course and fine grained reconfigurable elements. In alternative implementations, the present invention may comprise a reconfigurable processor comprising both reconfigurable devices with fine grained logic elements and reconfigurable devices with course grained logic elements or a reconfigurable processor comprising both reconfigurable devices with fine grained elements and non-reconfigurable devices with course grained elements.
1. A circuit board having opposite first and second sides thereof, said circuit board comprising:
first and second pluralities of bonding pads affixed on said opposite first and second sides of said circuit board respectively;
a first integrated circuit device having programmable pins bonded to at least a subset of said first plurality of bonding pads;
a second integrated circuit device having programmable pins bonded to at least a subset of said second plurality of bonding pads;
a plurality of vias formed intermediate said opposite first and second sides of said circuit board for electrically interconnecting opposing ones of said subset of said first and second pluralities of bonding pads; and
a plurality of conductive traces for electrically interconnecting each of a subset of said programmable pins of said first integrated circuit device to unique programmable pins of a subset of said second integrated circuit device wherein said subset of programmable pins of said first integrated circuit and said subset of second integrated circuit are reconfigured to optimize bandwidth of said plurality of conductive traces interconnecting said first integrated circuit to said second integrated circuit.
2. The circuit board of claim 1 wherein said first and second integrated circuit devices comprise a user array for an adaptive processor element.
3. A reconfigurable processor element comprising:
at least one fine grained logic element wherein said at least one fine grained logic element comprises a plurality of reconfigurable fine grained logic elements including fine grained logic element programmable pins
at least one coarse grained logic element wherein said at least one coarse grained logic element comprises a plurality of reconfigurable coarse grained logic elements including coarse grained logic element programmable pins; and
a carrier board for electrically interconnecting said at least one fine grained logic element and said at least one coarse grained logic element by forming vias between said fine grained logic element programmable pins and said coarse grained logic element programmable pins so as to maximize bandwidth between said at least one fine grained logic element and said coarse grained logic element.
4. The reconfigurable processor element of claim 3 wherein said at least one fine grained logic element comprises an FPGA.
5. The reconfigurable processor element of claim 3 wherein said at least one coarse grained logic element comprises an ASIC.
6. The reconfigurable processor element of claim 3 wherein said at least one fine grained logic element comprises elements which are reconfigurable and said coarse grained logic element comprises elements which are non-reconfigurable.
7. The reconfigurable processor element of claim 3 wherein said at least one coarse grained logic element is configured to provided substantially dedicated high level mathematical functions.
8. The reconfigurable processor element of claim 7 wherein said high level mathematical functions comprise floating point operations.
9. The reconfigurable processor element of claim 3 wherein said at least one coarse grained logic element is configured to provided substantially dedicated high level I/O functions.
10. The reconfigurable processor element of claim 9 wherein said high level I/O functions comprise Ethernet connectivity.
11. The reconfigurable processor element of claim 9 wherein said high level I/O functions comprise disk drive connectivity.
12. The reconfigurable processor element of claim 3 which is programmable utilizing a standard high level programming language.
13. The reconfigurable processor element of claim 3 which utilizes data streaming for data movement between said at least one fine grained logic element and said at least one coarse grained element.
14. The reconfigurable processor element of claim 3 which utilizes data streaming for data movement between said reconfigurable processor element and other elements of a computer system comprising said reconfigurable processor element.
15. The reconfigurable processor element of claim 3 wherein said at least one fine grained logic element and said at least one coarse grained logic clement are coupled to opposite sides of a carrier board.
16. A carrier board for a reconfigurable processor element comprising:
a first side for mounting a first logic element having a first device pinout wherein said first logic element comprises at least one fine grained logic element and wherein said first device pinout is reconfigurable; and
a second opposite side for mounting a second logic element having a differing second device reconfigurable pinout wherein said second logic element comprises at least one coarse grained logic element and wherein at least one of said first device pinout and at least one of said second device pinout is reconfigured to optimize bandwidth between said first logic element and said second logic element.
17. The carrier board of claim 16 wherein said second device pinout is reconfigurable.
18. The carrier board of claim 16 wherein said first logic element comprises an FPGA.
19. The carrier board of claim 16 wherein said second logic element comprises an ASIC.