Interconnects for semiconductor light emitting devices
View Patent ↗A semiconductor light emitting device including a light emitting layer disposed between an n-type region and a p-type region and contacts electrically connected to the n-type region and the p-type region is connected to a mount. A metal layer arbitrarily patterned to cover at least 20% of the area of the semiconductor light emitting device is plated on either a metal layer formed on the mount or a metal layer formed on one of the contacts. The plated metal layer may replace other known interconnecting techniques such as stud bumps. The semiconductor light emitting device is physically connected to the mount by causing interdiffusion between the contact surfaces of the metal layers. In some embodiments, a layer of solder is formed over the plated metal layer, and then the semiconductor light emitting device is physically connected to the mount by heating the solder.
1. A method comprising:
providing a semiconductor light emitting device comprising:
a light emitting layer disposed between an n-type region and a p-type region;
contacts electrically connected to the n-type region and the p-type region; and
a first metal layer formed on one of the contacts; providing a mount comprising:
a second metal layer formed on the mount; and
a third metal layer plated over the second metal layer; and
physically connecting the semiconductor light emitting device to the mount by causing interdiffusion of the first, second, and third metal layers;
wherein the third metal layer has a lateral extent of at least 20% of an area of the semiconductor light emitting device.
2. The method of claim 1 wherein causing interdiffusion comprises causing the semiconductor light emitting device to vibrate.
3. The method of claim 1 wherein the first and second metals each comprise one of Au, Cu, Ni, and Al.
4. The method of claim 1 wherein the third metal comprises one of Au, Cu, Ni, and Al.
5. The method of claim 1 further comprising lithographically patterning the first and second metal layers to form predetermined shapes.
6. The method of claim 1 further comprising annealing the third metal layer after plating.
7. The method of claim 1 wherein causing interdiffusion comprises providing an ambient temperature between 150 and 600° C.
8. The method of claim 1 causing interdiffusion comprises applying pressure to the semiconductor light emitting device.
9. The method of claim 1 wherein a thickness of the third metal layer is between 1 and 50 microns.
10. The method of claim 1 wherein a thickness of the third metal layer is between 5 and 20 microns.
11. The method of claim 1 wherein the third metal layer has a lateral extent of at least 30% of an area of the semiconductor light emitting device.
12. The method of claim 1 wherein the third metal layer has a lateral extent of at least 40% of an area of the semiconductor light emitting device.
13. A method comprising:
providing a semiconductor light emitting device comprising:
a light emitting layer disposed between an n-type region and a p-type region; and
contacts electrically connected to the n-type region and the p-type region;
forming a first metal layer on one of the contacts;
plating a second metal layer on the first metal layer;
providing a mount comprising a third metal layer formed on the mount; and
physically connecting the semiconductor light emitting device to the mount by causing interdiffusion of the first, second, and third metal layers;
wherein the second metal layer has a lateral extent of at least 20% of an area of the semiconductor light emitting device.
14. The method of claim 13 wherein the first and third metals each comprise one of Au, Cu, Ni, and Al.
15. The method of claim 13 wherein the second metal comprises one of Au, Cu, Ni, and Al.
16. The method of claim 13 wherein causing interdiffusion comprises causing the semiconductor light emitting device to vibrate.
17. The method of claim 13 wherein causing interdiffusion comprises providing an ambient temperature between 150 and 600° C.
18. The method of claim 13 causing interdiffusion comprises applying pressure to the semiconductor light emitting device.
19. The method of claim 13 wherein a thickness of the second metal layer between 1 and 50 microns.
20. method of claim 13 wherein a thickness of the second metal layer is between 5 and 20 microns.