Die customization using programmable resistance memory elements

1. A method of customizing an integrated circuit chip, comprising the steps of:

providing an electronic device or electronic circuit on said chip;

providing a programmable resistance element on said chip; and

storing information in said programmable resistance element, said programmable resistance element having a plurality of resistance states, said scoring including transforming said programmable resistance element to a first of said resistance states, said information designating a characteristic of said electronic device, said electronic circuit, or said chip; and

transforming said programmable resistance element to a second of said resistance states.

2. The method of claim 1 , further comprising the step of, after said storing step, applying at least a portion of said information to one or more latches on said integrated circuit chip.

3. The method of claim 1 , wherein said electronic device or electronic circuit is a primary memory device.

4. The method of claim 3 , wherein said information includes at least one defective address of said primary memory device.

5. The method of claim 4 , wherein said primary memory device is non phase-change.

6. The method of claim 4 , wherein said primary memory device is a volatile memory.

7. The method of claim 6 , wherein said volatile memory is an SRAM device or a DRAM device.

8. The method of claim 3 , wherein said primary memory device is a phase-change memory device.

9. The method of claim 1 , wherein said information includes at least one operating parameter of said electronic device or electronic circuit.

10. The method of claim 9 , wherein said at least one operating parameter is chosen from the group consisting of speed, power, and voltage.

11. The method of claim 1 , wherein said information is associated with the manufacture of said electronic device or electronic circuit.

12. The method of claim 1 , wherein said programmable resistance element includes at least one chalcogen element.

13. The method of claim 1 , wherein said programmable resistance element comprises a phase-change memory.

14. The method of claim 1 , wherein said information identifies said electronic device or electronic circuit.

15. The method of claim 1 , wherein said information is used for customization of said chip.

16. The method of claim 15 , wherein said customization is field customization.

17. The meted of claim 1 , wherein said information designates a feature of a product that incorporates said chip.

18. The method of claim 1 , wherein said information designates the design of said chip.

19. The method of claim 1 further comprising the step of reading said information stored in said phase-change memory.

20. The method of claim 19 , wherein said reading step is performed optically.

21. The method of claim 1 , wherein said plurality of resistance states includes three or more resistance states.