Semiconductor device
View Patent ↗A capacity element with a simple configuration exhibits excellent production reliability. A semiconductor device 100 includes a capacity element consisting of a lower electrode 102, an SiCN film 107 and an upper electrode 113. In an insulating film 101 on a semiconductor substrate is formed a groove, in which the lower electrode 102 is buried. The lower electrode 102 includes two regions, that is, a first lower electrode 103 and a second lower electrode 105, which are separated from each other via the insulating film 101.
1. A semiconductor device comprising:
an insulating film formed on a semiconductor substrate;
an interconnect buried in an interconnect trench formed in said insulating film;
a lower electrode buried in a groove formed in said insulating film, said lower electrode comprising plural electrode regions separated from each other by said insulating film, said lower electrode being formed in a same layer as said interconnect;
a capacitor film formed on and in physical contact with said lower electrode; and
an upper electrode formed on said capacitor film,
wherein said upper electrode covers said plural electrode regions,
wherein said upper electrode comprises as a main component a material different from a metal which comprises a main component of said interconnect,
wherein a top surface of said capacitor film contacts a single said upper electrode and a bottom surface of said capacitor film contacts said plural electrode regions, and
wherein said capacitor film has a substantially flat shape.
2. The semiconductor device according to claim 1 , wherein said lower electrode is comprised of first and second electrode assemblies comprising said plurality of electrode regions that are disposed in parallel.
3. The semiconductor device according to claim 2 , wherein said plurality of electrode regions are arranged as strips.
4. The semiconductor device according to claim 3 , wherein said plurality of electrode regions are arranged as strips and as a lattice on a substrate in-plane direction.
5. The semiconductor device according to claim 2 , wherein said insulating film intervening between said first and said second electrode regions is arranged as a bent shape on said substrate plane.
6. The semiconductor device according to claim 1 , wherein said electrode regions are arranged as a comb tooth shape.
7. The semiconductor device according to claim 6 , wherein said electrode regions are arranged as a comb tooth shape where said ends of said teeth are uneven.
8. The semiconductor device according to claim 7 , wherein
said lower electrode comprises first and second electrode regions having a comb tooth shape where said ends of said teeth are uneven, and
said insulating film intervening between said first and said second electrode regions is arranged as a bent shape on said substrate plane.
9. The semiconductor device according to claim 1 , wherein a minimum distance between an end of one of said electrode regions and an end of another of said electrode regions is 0.2 μm or less.
10. The semiconductor device according to claim 1 ,
wherein said capacitor film is formed over said lower electrode and said interconnect and acts as a diffusion barrier film for said interconnect.
11. The semiconductor device according to claim 1 , further comprising
an insulating diffusion barrier film formed over said interconnect and said capacitor film,
wherein said upper electrode is formed over said diffusion barrier film.
12. A semiconductor device according to claim 1 , wherein said insulating film comprises a plurality of first portions elongated in one direction and a plurality of shorter second portions elongated in another direction that connects said plurality of first portions, and
wherein said insulating film is enclosed by said lower electrodes in plan view.
13. A semiconductor device according to claim 12 , wherein said another direction is perpendicular to said one direction.