IP Library Granted Patent US 7,397,126
Granted Patent B2
US 7,397,126 · App. 11/236,563 · Granted Jul 8, 2008

Semiconductor device

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,397,126
App. No.
11/236,563
Granted
Jul 8, 2008
Kind
B2
Abstract

The present invention provides inhibiting an electrical leakage caused by anion migration. A trenched portion 15 is provided as ion migration-preventing zone between a source electrode 4 and a gate electrode 5 . The trenched portion 15 is formed so as to surround a periphery of the source electrode 4.

Claims (23)

1. A semiconductor device, comprising:

a first electrode;

a second electrode adjacent to said first electrode; and

an insulator cover film covering a part of said first electrode and formed between said first electrode and said second electrode, said insulator cover film including a trench that forms a ring surrounding said first electrode and has two trench side walls, each of said two trench side walls having a portion that is substantially perpendicular to a direction extending from said first electrode to said second electrode.

2. The device of claim 1 , further comprising an encapsulating resin.

3. The device of claim 2 , wherein each said wall comprises a surface between said insulating cover film and said encapsulating resin.

4. The device of claim 1 , wherein each said wall is formed by an insulator cover film having a ridge between the first electrode and the second electrode.

5. The device of claim 1 , wherein each said wall comprises an overhanging geometry.

6. The device of claim 1 , wherein each said wall comprises a plurality of walls that are substantially perpendicular to a direction extending from said first electrode to said second electrode.

7. A semiconductor device, comprising:

a semiconductor chip;

a plurality of electrodes provided on a surface of said semiconductor chip; and

an ion migration-inhibiting zone provided between an electrode in a side of higher potential and an electrode in a side of lower electric potential among said plurality of electrodes, said electrodes being mutually adjacent,

wherein said ion migration-inhibiting zone comprises a wall that is substantially perpendicular to a direction extending from the higher potential electrode to the lower potential electrode, and

wherein said wall is formed by an insulator having a trenched portion provided therein between said electrode in the side of higher potential and said electrode in the side of lower potential, the region having said trenched portion comprising said ion migration-preventing zone, said wall of said trenched portion further comprising an overhanging geometry.

8. The semiconductor device according to claim 7 , wherein said trenched portion separates said electrode in the side of higher potential from said electrode in the side of lower potential.

9. The semiconductor device according to claim 7 , wherein said trenched portion comprises a plurality of parallely provided trenches.

10. The semiconductor device according to claim 7 , wherein said electrode in the side of higher potential comprises silver, and said electrode in the side of lower potential comprises aluminum.

11. The semiconductor device according to claim 7 , wherein said ion migration-inhibiting zone encloses either said electrode in the side of higher potential or said electrode in the side of lower potential.

12. The semiconductor device according to claim 7 , wherein said semiconductor chip further comprises an insulated gate field effect transistor, said electrode in the side of higher potential comprises a source electrode of said insulated gate field effect transistor, and said electrode in the side of lower potential comprises a gate electrode of said insulated gate field effect transistor.

13. The device of claim 7 , wherein said wall is formed by an insulator having a ridge between said higher potential electrode and said lower potential electrode.

14. The device of claim 7 , wherein said wall further comprises an overhanging-shaped wall.

15. The device of claim 14 , further comprising an insulating cover film and an encapsulating resin, wherein said wall comprises a surface between said insulating cover film and said encapsulating resin.

Assignments (3)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
CHANGE OF NAME Recorded Nov 11, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025346/0886 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 3, 2005
From: KATO, TOMOKI
To: NEC ELECTRONICS CORPORATION
Reel/Frame 016978/0759 →