Method and apparatus for N+1 packet level mesh protection
View Patent ↗Methods and apparatus are provided for N+1 packet level mesh protection. An error correction encoding method is provided that assembles M-T data packets; appends a sequence number and a payload integrity check to each of the M-T data packets; and creates T protection packets having the sequence number and payload integrity check, wherein a payload for each of the T protection packets are formed from corresponding symbols in the M-T data packets. An error correction decoding method is also provided that receives a plurality of error-free packets and one or more packets having an error; and reconstructs the one or more packets having an error by applying block erasure decoding to said plurality of error-free packets, whereby one packet having an error can be reconstructed for each protection packet used to encode the received packets.
1. An error correction encoding computer implemented method, comprising:
assembling M-T data packets, wherein M is a number of packets in a M-way mesh and T is a number of protection packets;
appending a sequence number and a payload integrity check to each of said M-T data packets; and
creating T protection packets having said sequence number and payload integrity check, wherein a payload for each of said T protection packets comprises one or more payload symbols each generated from symbols in a corresponding location in said M-T data packets.
2. The method of claim 1 , wherein said payload of said T protection packets is equal on a symbol-by-symbol basis to the check symbols of a block erasure code calculated over the symbols in a corresponding location in said M-T packets.
3. The method of claim 1 , wherein said payload integrity check is a cyclic redundancy check.
4. The method of claim 3 , wherein said cyclic redundancy check is a CRC-32.
5. The method of claim 1 , wherein said payload integrity check employs an error correcting code.
6. An error correction encoder, comprising:
a memory; and
at least one processor, coupled to the memory, operative to:
assemble M-T data packets, wherein M is a number of packets in a M-way mesh and T is a number of protection packets;
append a sequence number and a payload integrity check to each of said M-T data packets; and
create T protection packets having said sequence number and payload integrity check, wherein a payload for each of said T protection packets comprises one or more payload symbols each generated from symbols in a corresponding location in said M-T data packets.
7. The error correction encoder of claim 6 , wherein said payload is equal to the check symbols of a block erasure code calculated over the symbols in a corresponding location in said M-T packets.
8. The error correction encoder of claim 6 , wherein said payload integrity check is a cyclic redundancy check.
9. The error correction encoder of claim 8 , wherein said cyclic redundancy check is a CRC-32.
10. The error correction encoder of claim 6 , wherein said payload integrity check employs an error correcting code.
11. An error correction encoding computer implemented method, comprising:
assembling a number of data packets, wherein M is a number of packets in a M-way mesh and T is a number of protection packets;
appending a sequence number and a payload integrity check to each of said data packets; and
creating a number of protection packets having said sequence number and payload integrity check, wherein a payload for each of said protection packets comprises one or more payload symbols each generated from symbols in a corresponding location in said data packets.
12. The method of claim 11 , wherein said payload of said protection packets is equal on a symbol-by-symbol basis to the check symbols of a block erasure code calculated over the symbols in a corresponding location in said packets.
13. The method of claim 11 , wherein said payload integrity check is a cyclic redundancy check.
14. The method of claim 13 , wherein said cyclic redundancy check is a CRC-32.
15. The method of claim 11 , wherein said payload integrity check employs an error correcting code.