IP Library Granted Patent US 8,032,818
Granted Patent B2
US 8,032,818 · App. 11/241,761 · Granted Oct 4, 2011

Method and apparatus for storing survivor paths in a Viterbi detector using input-dependent pointer exchange

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Quick Facts
Patent No.
US 8,032,818
App. No.
11/241,761
Granted
Oct 4, 2011
Kind
B2
Abstract

Methods and apparatus are provided for storing survivor paths in a Viterbi detector. At least one register and at least one pointer are maintained for each state. Each register stores a bit sequence associated with a Viterbi state and each pointer points to one of the registers. A trellis transition type is determined, for example, based on a decision from an add/compare/select unit. One or more predefined rules based on a trellis structure and the trellis transition type are employed to exchange one or more of the pointers and to update one or more of the at least one registers. A survivor path memory is also disclosed for a Viterbi detector. The survivor path memory comprises a plurality of columns, each associated with a different time step, and an input processor. Each column comprises a latch for storing one bit of a bit sequence associated with a Viterbi state.

Claims (34)

1. A method for storing survivor paths in a Viterbi detector, comprising:

maintaining at least one register and at least one pointer for each state, wherein each of said registers stores a bit sequence associated with a Viterbi state and each of said pointers points to one of said registers;

determining a trellis transition type; and

employing one or more predefined rules based on a trellis structure and said trellis transition type to exchange one or more of said pointers and to update one or more of said at least one registers.

2. The method of claim 1 , further comprising transforming said trellis to one or more butterfly trellises.

3. The method of claim 1 , further comprising collapsing said trellis to combine a plurality of steps into a single step.

4. The method of claim 1 , wherein one or more of said states do not change values and wherein said associated pointers are not updated by said one or more predefined rules.

5. The method of claim 1 , wherein one or more of said states do not change values for each cycle and wherein said associated pointers are not updated by said one or more predefined rules unless a change is required.

6. The method of claim 1 , wherein said one or more predefined rules exchange said one or more pointers based on a current cycle.

7. The method of claim 1 , wherein said trellis transition type is determined based on a decision from an add/compare/select unit.

8. A system for storing survivor paths in a Viterbi detector, comprising:

a memory; and

at least one processor, coupled to the memory, operative to:

maintain at least one register and at least one pointer for each state, wherein each of said registers stores a bit sequence associated with a Viterbi state and each of said pointers points to one of said registers;

determine a trellis transition type; and

employ one or more predefined rules based on a trellis structure and said trellis transition type to exchange one or more of said pointers and to update one or more of said at least one registers.

9. The system of claim 8 , wherein said trellis structure comprises one or more butterfly trellises.

10. The system of claim 8 , wherein said trellis structure has been collapsed to combine a plurality of steps into a single step.

11. The system of claim 8 , wherein one or more of said states do not change values and wherein said associated pointers are not updated by said one or more predefined rules.

12. The system of claim 8 , wherein one or more of said states do not change values for each cycle and wherein said associated pointers are not updated by said one or more predefined rules unless a change is required.

13. The system of claim 8 , wherein said one or more predefined rules exchange said one or more pointers based on a current cycle.

14. The system of claim 8 , wherein said trellis transition type is determined based on a decision from an add/compare/select unit.

15. A survivor path memory for a Viterbi detector, comprising:

a plurality of columns, each of said columns associated with a different time step, each of said columns comprising:

a latch for storing one bit of a bit sequence associated with a Viterbi state, each of said latches having at least one data input; and

a multiplexer for each state controlled by a selection signal, said multiplexer selecting a state from a previous time step, wherein an output of said multiplexer of a given state is connected to said at least one data input of a latch of said given state; and

an input processor for generating a control signal that exchanges one or more pointers based on a trellis structure and a trellis transition type based on a decision from an add/compare/select unit, wherein each of said pointers points to one of said latches.

16. The survivor path memory of claim 15 , wherein one or more of said states do not change values and wherein said associated pointers are not updated in said associated latches.

17. The survivor path memory of claim 15 , wherein one or more of said latches are updated based on a value of a write enable signal.

18. The survivor path memory of claim 15 , wherein an output of each of said latches is stored in a corresponding buffer, and wherein said buffer contents are read based on a value of a read enable signal.

19. The survivor path memory of claim 15 , wherein one or more of said latches are updated based on a value provided by an input processor.

20. The survivor path memory of claim 15 , wherein a plurality of multiplexers for each state comprise a crossbar employing only required connections.

21. The survivor path memory of claim 15 , wherein said trellis structure comprises one or more butterfly trellises.

22. The survivor path memory of claim 15 , wherein said trellis structure has been collapsed to combine a plurality of steps into a single step.

Assignments (10)
CORRECTIVE ASSIGNMENT TO CORRECT THE PROPERTY NUMBERS PREVIOUSLY RECORDED AT REEL: 47630 FRAME: 344. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Mar 21, 2019
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From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047630/0344 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
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TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032856-0031) Recorded Feb 2, 2016
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ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 3, 2015
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CERTIFICATE OF CONVERSION Recorded Aug 29, 2014
From: AGERE SYSTEMS INC.
To: AGERE SYSTEMS LLC
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PATENT SECURITY AGREEMENT Recorded May 8, 2014
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