Nonvolatile semiconductor memory device
View Patent ↗Characteristics of a nonvolatile semiconductor memory device are improved. The memory cell comprises: an ONO film constituted by a silicon nitride film SIN for accumulating charge and by oxide films BOTOX and TOPOX disposed thereon and thereunder; a memory gate electrode MG disposed at an upper portion thereof; a select gate electrode SG disposed at a side portion thereof through the ONO film; a gate oxide film SGOX disposed thereunder. By applying a potential to a select gate electrode SG of a memory cell having a source region MS and a drain region MD and to the source region MS and by accelerating electrons flowing in a channel through a high electric field produced between a channel end of the select transistor and an end of an n-type doped region ME disposed under the memory gate electrode MG, hot holes are generated by impact ionization, and the hot holes are injected into a silicon nitride film SIN by a negative potential applied to the memory gate electrode MG, and thereby an erase operation is performed.
1. A semiconductor device comprising:
first and second semiconductor regions formed in a semiconductor substrate;
a first insulator film formed on the semiconductor substrate and including a charge accumulation portion,
wherein holes are generated in a third semiconductor region between the first and second semiconductor regions by flowing a current between the first semiconductor region and the second semiconductor region and then the holes generated in the third region are injected into the charge accumulation portion.
2. A semiconductor device according to claim 1 , further comprising:
a second insulator film formed on the third semiconductor region;
a first conductor formed on the first insulator film; and
a second conductor formed on the second insulator film,
wherein the first semiconductor region and the second conductor are supplied a different voltage to generate a channel in the third semiconductor region.
3. A semiconductor device according to claim 2 ,
wherein a portion of the first insulator film is between the first conductor and the second conductor.
4. A semiconductor device according to claim 2 ,
wherein when the holes are injected into the charge accumulation portion, the first conductor is supplied a negative voltage.
5. A semiconductor device according to claim 2 ,
wherein the holes are generated under a gap of the first and second conductors.
6. A semiconductor device according to claim 1 ,
wherein the charge accumulation portion is a trap insulator film formed in the first insulator film.
7. A semiconductor device according to claim 1 ,
wherein the charge accumulation portion is a nitride film formed in the first insulator film.
8. A semiconductor device according to claim 1 ,
wherein the first insulator film is a laminated film of a first oxide film, a nitride film, and a second oxide film.