IP Library Granted Patent US 7,308,658
Granted Patent B2
US 7,308,658 · App. 11/252,019 · Granted Dec 11, 2007

Method and apparatus for measuring test coverage

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Quick Facts
Patent No.
US 7,308,658
App. No.
11/252,019
Granted
Dec 11, 2007
Kind
B2
Abstract

A method, computer program product, and data processing system for determining test sequences' coverage of events in testing a semiconductor design are disclosed. Test patterns are randomly generated by one or more “frontend” computers. Results from applying these patterns to the design under test are transmitted to a “backend” computer in the form of an ordered dictionary of events and bitmap and/or countmap data structures. A “bitmap” data structure encodes Boolean information regarding whether or not a given event was covered by a particular test sequence. A “countmap” data structure includes frequency information indicating how many times a given event was triggered by a particular test sequence. The backend computer combines results from each test sequence in a cumulative fashion to measure the overall coverage of the set of test sequences.

Claims (33)

1. A computer-implemented method comprising:

obtaining a first test result vector corresponding to a first test pattern applied to a design under test, wherein the first test result vector indicates coverage of one or more events triggered by the first test pattern;

obtaining a second test result vector corresponding to a second test pattern applied to the design under test, wherein the second test result vector indicates coverage of one or more events triggered by the second test pattern; and

merging coverage data from at least the first test result vector and the second test result vector to obtain a merged event coverage vector, wherein the merged event coverage vector is smaller in size than a juxtaposition of the first test result vector and the second test result vector and wherein the merged event coverage vector indicates coverage of events triggered by at least the first test pattern and the second test pattern, and wherein the merged event coverage vector contains a plurality of entries and each of the plurality of entries is a Boolean value representing whether a corresponding event was covered.

2. The method of claim 1 , wherein the merging comprises performing a logical-OR of corresponding entries from the first test result vector and the second test result vector to obtain the plurality of entries in the merged event coverage vector.

3. The method of claim 1 , wherein the merged event coverage vector contains a plurality of entries and each of the plurality of entries is a numerical value representing a number of times a corresponding event was covered.

4. The method of claim 3 , wherein the merging comprises arithmetically adding entries from the first test result vector and the second test result vector to obtain the plurality of entries in the merged event coverage vector.

5. The method of claim 1 , further comprising:

obtaining an event dictionary wherein events represented in the first test result vector and the second test result vector are correlated to the event dictionary.

6. The method of claim 5 , wherein the event dictionary is an ordered collection of event identifiers and the first test result vector and the second test result vector are correlated to the event dictionary by presenting entries corresponding to events in a same order as that of the event dictionary.

7. The method of claim 1 , wherein the first test result vector is obtained from a first computer system and the second test result vector is obtained from a second computer system.

8. The method of claim 7 , wherein the first test result vector and the second test result vector are obtained from the first computer system and the second computer system asynchronously.

9. The method of claim 7 , further comprising:

obtaining a third test result vector; and

merging the third test result vector into the merged coverage result vector.

10. A computer program product in a computer-readable medium comprising functional descriptive material that, when executed by a computer, directs the computer to perform actions of:

obtaining a first test result vector corresponding to a first test pattern applied to a design under test, wherein the first test result vector indicates coverage of one or more events triggered by the first test pattern;

obtaining a second test result vector corresponding to a second test pattern applied to the design under test, wherein the second test result vector indicates coverage of one or more events triggered by the second test pattern; and

merging coverage data from at least the first test result vector and the second test result vector to obtain a merged event coverage vector, wherein the merged event coverage vector is smaller in size than a juxtaposition of the first test result vector and the second test result vector and wherein the merged event coverage vector indicates coverage of events triggered by at least the first test pattern and the second test pattern, and wherein the merged event coverage vector contains a plurality of entries and each of the plurality of entries is a Boolean value representing whether a corresponding event was covered.

11. The computer program product of claim 10 , wherein the merged event coverage vector contains a plurality of entries and each of the plurality of entries is a numerical value representing a number of times a corresponding event was covered.

12. The computer program product of claim 10 , comprising additional functional descriptive material that, when executed by a computer, directs the computer to perform actions of:

obtaining an event dictionary wherein events represented in the first test result vector and the second test result vector are correlated to the event dictionary.

13. The computer program product of claim 12 , wherein the event dictionary is an ordered collection of event identifiers and the first test result vector and the second test result vector are correlated to the event dictionary by presenting entries corresponding to events in a same order as that of the event dictionary.

14. The computer program product of claim 10 , wherein the first test result vector is obtained from a first computer system and the second test result vector is obtained from a second computer system.

15. The computer program product of claim 14 , wherein the first test result vector and the second test result vector are obtained from the first computer system and the second computer system asynchronously.

16. A data processing system comprising:

one or more processors;

at least one data store associated with the one or more processors; and

a set of instructions contained in the at least one data store, wherein the one or more processors executes the set of instructions to perform actions of:

obtaining a first test result vector corresponding to a first test pattern applied to a design under test, wherein the first test result vector indicates coverage of one or more events triggered by the first test pattern;

obtaining a second test result vector corresponding to a second test pattern applied to the design under test, wherein the second test result vector indicates coverage of one or more events triggered by the second test pattern; and

merging coverage data from at least the first test result vector and the second test result vector to obtain a merged event coverage vector, wherein the merged event coverage vector is smaller in size than a juxtaposition of the first test result vector and the second test result vector and wherein the merged event coverage vector indicates coverage of events triggered by at least the first test pattern and the second test pattern, and wherein the merged event coverage vector contains a plurality of entries and each of the plurality of entries is a Boolean value representing whether a corresponding event was covered.

17. The data processing system of claim 16 , wherein the merged event coverage vector contains a plurality of entries and each of the plurality of entries is a numerical value representing a number of times a corresponding event was covered.

Assignments (20)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 25, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NORTH STAR INNOVATIONS INC.
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ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
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To: MORGAN STANLEY SENIOR FUNDING, INC.
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ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
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To: MORGAN STANLEY SENIOR FUNDING, INC.
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PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0225 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0670 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0143 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0553 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
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SECURITY AGREEMENT Recorded Jun 18, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
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SECURITY AGREEMENT Recorded May 13, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 024397/0001 →
SECURITY AGREEMENT Recorded Jul 11, 2008
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A.
Reel/Frame 021217/0368 →
SECURITY AGREEMENT Recorded Feb 2, 2007
From: FREESCALE SEMICONDUCTOR, INC.; FREESCALE ACQUISITION CORPORATION; FREESCALE ACQUISITION HOLDINGS CORP.; FREESCALE HOLDINGS (BERMUDA) III, LTD.
To: CITIBANK, N.A. AS COLLATERAL AGENT
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ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 17, 2005
From: WOOD, GEORGE W.; BHINGE, AMOL V.
To: FREESCALE SEMICONDUCTORS, INC.
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