Capacitor and method of manufacturing the same
A capacitor and method of manufacturing the same include an insulating interlayer, a lower electrode, a protection structure, a dielectric layer and an upper electrode. The insulating interlayer may include a conductive pattern formed on a substrate. The lower electrode may be electrically connected to the conductive pattern. The protection structure may be formed on an outer sidewall of the cylindrical lower electrode and on the insulating interlayer.
1. A method of manufacturing a capacitor comprising:
forming an insulating interlayer having a conductive pattern on a substrate;
forming a first protection layer on the insulating interlayer;
forming a mold layer on the first protection layer, the mold layer having an opening that exposes the conductive pattern;
forming a second protection layer on a sidewall of the opening to form a protection structure including the first protection layer and the second protection layer;
forming a lower electrode on the conductive pattern, wherein the second protection layer encloses an outer sidewall of the lower electrode;
forming a dielectric layer on the lower electrode and the protection structure; and
forming an upper electrode on the dielectric layer.
2. The method of claim 1 , wherein the conductive pattern is formed using polysilicon doped with impurities.
3. The method of claim 1 , wherein the lower electrode is formed using a metal or a metal compound.
4. The method of claim 3 , wherein the lower electrode is formed using at least one of titanium and titanium nitride.
5. The method of claim 1 , wherein forming the lower electrode includes:
forming a conductive layer on the conductive pattern, the second protection layer, the sidewall of the opening and the mold layer;
forming a sacrificial layer on the conductive layer to fill up the opening;
partially removing the conductive layer and the sacrificial layer to form the lower electrode in the opening; and
removing the mold layer and the sacrificial layer.
6. The method of claim 5 , wherein the mold layer and the sacrificial layer are removed by a wet etching process.
7. The method of claim 1 , wherein the first and the second protection layers are formed using insulation material that has an etching selectivity relative to the dielectric layer.
8. The method of claim 7 , wherein the first and the second protection layers are formed using at least one of metal oxide, silicon nitride and anti-reflective material.
9. The method of claim 1 , further comprising treating a surface of the first protection layer by a plasma treatment process or a thermal treatment process.
10. The method of claim 9 , wherein the surface of the first protection layer is treated at a temperature of about 360 to about 420° C.
11. The method of claim 9 , wherein the surface of the first protection layer is treated under an ammonia (NH 3 ) atmosphere or an oxygen (O 2 ) atmosphere.
12. The method of claim 1 , wherein forming the second protection layer includes:
forming a preliminary second protection layer on the sidewall of the opening and the mold layer; and
selectively removing portions of the preliminary second protection layer positioned on the mold layer and a bottom face of the opening.
13. The method of claim 12 , further comprising treating a surface of the preliminary second protection layer by a plasma treatment process or a thermal treatment process.
14. The method of claim 13 , wherein the surface of the second protection layer is treated at a temperature of about 360 to about 420° C. under an ammonia atmosphere or an oxygen atmosphere.
15. The method of claim 1 , further comprising forming an etch stop layer between the insulating interlayer and the first protection layer.
16. The method of claim 1 , wherein a shape of the lower electrode is cylindrical.