Semiconductor device including chips with electrically-isolated test elements and its manufacturing method
View Patent ↗In a semiconductor device including a semiconductor substrate and an electrode pad formed over the semiconductor substrate, at least one of test element is formed in a region of the semiconductor substrate beneath the electrode pad. The test element is electrically isolated from upper conductive layers outside of the region and the electrode pad.
1. A semiconductor device, comprising:
a semiconductor substrate;
an electrode pad of a plurality of electrode pads formed over said semiconductor substrate;
at least one test element formed in a region of said semiconductor substrate beneath said electrode pad, said test element being electrically isolated from any of the electrode pads that are disposed outside of said region, and from said electrode pad; and
at least another test element formed beneath another electrode pad of the plurality of electrode pads in said semiconductor substrate,
wherein said another electrode pad is electrically isolated from any element in said semiconductor device.
2. The semiconductor device as set forth in claim 1 , wherein said semiconductor device further comprises at least one circuit element formed in said region, and
wherein said at least one circuit element is electrically connected to a group of said electrode pads disposed outside of said region, and to said electrode pad.
3. The semiconductor device as set forth in claim 1 , wherein said test element is arranged completely beneath said electrode pad.
4. The semiconductor device as set forth in claim 1 , wherein said test element is arranged partly beneath said electrode pad.
5. The semiconductor device as set forth in claim 1 , wherein said test element is arranged in a periphery of said electrode pad.
6. The semiconductor device as set forth in claim 1 , wherein said test element comprises one of a transistor element, a resistance element and a capacitance element.
7. A semiconductor device, comprising:
a semiconductor substrate;
an electrode pad of a plurality of electrode pads formed over said semiconductor substrate;
at least one test element formed in a region of said semiconductor substrate beneath said electrode pad;
at least one circuit element formed in said region, and
at least another test element formed beneath another electrode pad of the electrode pads in said semiconductor substrate,
wherein said at least one test element is electrically isolated from any of the electrode pads that are disposed outside of said region, and from said electrode pad,
wherein said at least one circuit element is electrically connected to a group of said electrode pads that is disposed outside of said region, and
wherein said another electrode pad is electrically isolated from any element in said semiconductor device.
8. The semiconductor device as set forth in claim 1 ,
wherein a group of said plurality of electrode pads is electrically connected to said at least one circuit element via a plurality of connection lines.
9. The semiconductor device as set forth in claim 1 , wherein an area between said electrode pad and said test element comprises a plurality of insulating layers rather than a through structure.
10. The semiconductor device as set forth in claim 7 ,
wherein said group of said plurality of electrode pads is electrically connected to said at least one circuit element via a plurality of connection lines.