Semiconductor device including dummy patterns
View Patent ↗A semiconductor device in which surge breakdown of interlayer-insulating film does not occur even when effectively suppressing variations in etching and proximity effects. The semiconductor comprises dummy patterns 7 b that are made from a gate layer and shaped to be disposed within the surface shape of the insulating material of element-isolation areas 3 a and are located on the insulating material of the element-isolation areas 3 a ; wherein dummy patterns 7 b are located on an underlayer that includes area directly under wiring layers 10 a that are located on layers above the gate layer.
1. A semiconductor device, comprising:
a gate layer;
dummy gate patterns,
wherein said dummy gate patterns are located in locations, from among the entire gate layer area, located directly under an undermost wiring layer of a plurality of wiring layers located higher than said gate layer, or directly under wiring of a wiring layer that is separated from a surface of a semiconductor substrate by a distance of less than 0.7 μm, and
wherein said dummy gate patterns are provided at locations that are directly above an insulating material of an element-isolation area, and directly above an insulating material of a well having a conductance type opposite that of said semiconductor substrate.
2. The semiconductor device of claim 1 , wherein said wiring is electrically connected to an electrostatic-discharge-protection element.
3. The semiconductor device of claim 1 , further comprising an underlayer, said underlayer comprising a dummy isolation film provided between the dummy gate patterns and the semiconductor substrate.