Method for manufacturing a semiconductor component
View Patent ↗A method for manufacturing a semiconductor component using a sacrificial masking structure. A semiconductor device is formed from a semiconductor substrate and a layer of dielectric material is formed over the semiconductor substrate and the semiconductor device. The layer of dielectric material may be formed directly on the semiconductor substrate or spaced apart from the semiconductor substrate by an interlayer. Posts or protrusions having sidewalls are formed from the layer of dielectric material. An electrically insulating material that is preferably different from the layer of dielectric material is formed adjacent the sidewalls of the posts. The electrically insulating material is planarized and the posts are removed to form openings that may expose a portion of the semiconductor device or a portion of the interlayer material. An electrically conductive material is formed in the openings.
1. A method for manufacturing a semiconductor component, comprising:
providing a dielectric material;
forming a sacrificial masking structure from the dielectric material;
forming an insulating material adjacent the sacrificial masking structure; and
replacing the sacrificial masking structure with an electrically conductive material.
2. The method of claim 1 , further including providing a semiconductor material having a silicided region, wherein providing the dielectric material includes providing the dielectric material on the semiconductor material and wherein replacing the sacrificial masking structure includes removing the sacrificial masking structure and exposing the silicided region.
3. The method of claim 1 , wherein forming the sacrificial masking structure includes:
forming a layer of negative tone photoresist on the dielectric material;
forming at least one opening in the layer of negative tone photoresist, the at least one opening exposing a portion of the dielectric material;
etching a portion of the exposed portion of the dielectric material to form a contact opening in the dielectric material;
forming an amorphous silicon layer in the trench; and
planarizing the amorphous silicon layer.
4. A method for manufacturing a semiconductor component, comprising:
providing a substrate;
forming a first layer of dielectric material on the substrate;
forming at least one dielectric post from the first layer of dielectric material;
forming a hard mask material adjacent the at least one dielectric post, wherein the hard mask material is different from the first layer of dielectric material;
removing a portion of the at least one dielectric post, wherein removing the portion of the at least one post includes forming at least one opening in the first layer of dielectric material, the at least one opening having a floor and sidewalls; and
disposing an electrically conductive material over the floor and sidewalls of the at least one opening.
5. The method of claim 4 , wherein disposing the electrically conductive material over the floor and sidewalls of the at least one opening includes:
forming a barrier layer over the floor and sidewalls of the at least one opening; and
forming an electrically conductive material over the barrier layer.
6. The method of claim 4 , wherein providing the substrate includes providing a semiconductor substrate having a first silicide layer and a second silicide layer and wherein forming the at least one opening includes exposing at least one of the first silicide layer and the second silicide layer.
7. The method of claim 6 , further including forming the first silicide layer from a source region and forming the second silicide layer from a drain region, and wherein providing the semiconductor substrate further includes providing a gate structure.
8. A method for manufacturing a semiconductor component, comprising:
forming one or more posts from a layer of dielectric material, each post of the one or more posts having a sidewall;
forming a material adjacent at least one of the one or more posts;
removing a portion of at least one of the one or more posts;
wherein forming the one or more posts from the layer of dielectric material includes:
forming an etch mask over a first portion of the layer of dielectric material;
etching a second portion of the layer of dielectric material, the second portion of the layer of dielectric material unprotected by the etch mask;
wherein forming the material adjacent the at least one of the one or more posts includes disposing a material selected from the group of materials comprising amorphous silicon, silicon nitride, silicon dioxide, silicon oxynitride, and tungsten silicon;
wherein said method further includes planarizing the material adjacent the at least one of the one or more posts, removing a portion of the at least one or more posts to form an opening, and forming an electrically conductive material in the opening.
9. The method of claim 8 , wherein providing the semiconductor substrate includes providing the semiconductor substrate having a silicided region and wherein removing the portion of the at least one or more posts to form the opening includes exposing the silicided region.