IP Library Granted Patent US 8,068,538
Granted Patent B2
US 8,068,538 · App. 11/266,471 · Granted Nov 29, 2011

Jitter measuring apparatus, jitter measuring method and test apparatus

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Quick Facts
Patent No.
US 8,068,538
App. No.
11/266,471
Granted
Nov 29, 2011
Kind
B2
Abstract

There is provided a jitter measuring apparatus for measuring jitter in a signal-under-measurement, having a pulse generator for outputting a pulse signal having a pulse width set in advance corresponding to edges-under-measurement from which the timing jitter is to be measured in the signal-under-measurement, a filter for removing carrier frequency components of the signal-under-measurement from the pulse signal and a jitter calculator for calculating the jitter in the signal-under-measurement based on the signal outputted out of the filter.

Claims (25)

1. A jitter measuring apparatus for measuring timing jitter of a signal-under-measurement having a preset period, comprising:

a pulse generator for outputting a pulse signal having a constant pulse width corresponding to edges-under-measurement from which said timing jitter is to be measured and, a duty factor of respective cycles corresponding to timing jitter of said signal-under-measurement;

a filter for removing carrier frequency components of said signal-under-measurement from said pulse signal; and

a jitter calculator for calculating the timing jitter in said signal-under-measurement based on said signal output from said filter.

2. The jitter measuring apparatus as set forth in claim 1 , wherein said filter is a low pass filter that passes components below a predetermined cut-off frequency less than a carrier frequency of said signal-under-measurement among frequency components of said pulse signal.

3. The jitter measuring apparatus as set forth in claim 2 , further comprising a level shifting circuit for applying said pulse signal output from said pulse generator to said filter by shifting its signal level based on characteristics of said filter.

4. The jitter measuring apparatus as set forth in claim 2 , further comprising an integrator for integrating the signal output from said filter to provide an integrated output.

5. The jitter measuring apparatus as set forth in claim 4 , wherein said jitter calculator calculates the timing jitter in said signal-under-measurement based on the integrated output.

6. The jitter measuring apparatus as set forth in claim 5 , further comprising a level shifting circuit for applying the signal output from said filter to said integrator by shifting its signal level to a signal level based on characteristics of said integrator.

7. A jitter measuring method for measuring timing jitter in a signal-under-measurement having a preset period, comprising:

a pulse generating step of outputting a pulse signal, having a constant pulse width, corresponding to edges-under-measurement from which said timing jitter is to be measured and, a duty factor of respective cycles corresponding to timing jitter of said signal-under-measurement;

a filtering step of removing carrier frequency components of said signal-under-measurement from said pulse signal; and

calculating, using a jitter calculator, the timing jitter in said signal-under-measurement based on said signal output from said filter.

8. A test apparatus for testing a device-under-test, comprising:

a jitter measuring apparatus for measuring timing jitter in a signal-under-measurement, having a preset period, output from said device-under-test; and

a judging section for judging whether or not said device-under-test is defect-free based on the timing jitter in said signal-under-measurement measured by said jitter measuring apparatus,

wherein said jitter measuring apparatus comprises:

a pulse generator for outputting a pulse signal, having a constant pulse width, corresponding to edges-under-measurement from which said timing jitter is to be measured and, a duty factor of respective cycles corresponding to timing jitter of said signal-under-measurement having timing jitter;

a filter for removing carrier frequency components of said signal-under-measurement from said pulse signal; and

a jitter calculator for calculating the timing jitter in said signal-under-measurement based on an output of said filter.

9. An electronic device, comprising an internal circuit for outputting a signal-under-measurement having a preset period and a jitter measuring circuit for measuring timing jitter in the signal under test signal-under-measurement,

wherein said jitter measuring circuit comprises:

a pulse generator for outputting a pulse signal having a constant pulse width corresponding to edges-under-measurement from which said timing jitter is to be measured and, a duty factor of respective cycles corresponding to timing jitter of said signal-under-measurement;

a filter for removing carrier frequency components of said signal-under-measurement from said pulse signal; and

a jitter calculator for calculating the timing jitter in said signal-under-measurement based on said signal output from said filter.

Assignments (1)
CHANGE OF ADDRESS Recorded Dec 18, 2018
From: ADVANTEST CORPORATION
To: ADVANTEST CORPORATION
Reel/Frame 047987/0626 →