Semiconductor device manufacturing methods

1. A method of manufacturing a semiconductor device including a high-voltage device region and a low-voltage device region, the method comprising:

forming a gate pattern on the high-voltage device region and on the low-voltage device region;

forming a first lightly doped drain (LDD) structure in a first portion of the high-voltage device region on opposite sides of a first gate of the gate pattern by implanting first ions into the first portion of the high-voltage device region, wherein the first ions are implanted to a concentration of 1×10 13 to about 7×10 13 atoms/cm 2 ;

forming a second LDD structure in a second portion of the high-voltage device region on opposite sides of a second gate of the gate pattern by implanting second ions into the second portion of the high-voltage device region and simultaneously forming a third LDD structure in a portion of the low-voltage device region on opposite sides of a third gate of the gate pattern by implanting second ions into the low-voltage device region, wherein the second ions are implanted to a concentration of 5×10 14 to 5×10 15 atoms/cm 2 ;

forming a spacer at a side surface of the gate pattern;

forming a source region and a drain source at field regions disposed at the opposite sides of the gate pattern, respectively; and

forming a metal layer on a front surface of the substrate including the gate pattern.

2. A method as defined in claim 1 , wherein simultaneously forming the second and third lightly doped drain (LDD) structures comprises ion implantation using a same mask.

3. A method as defined in claim 1 , wherein the second portion of the high-voltage device region is at an edge of the high-voltage device region.

4. A method as defined in claim 1 , wherein an electrostatic discharge protecting device is formed in the second portion of the high-voltage device region.

5. A method as defined in claim 4 , wherein simultaneously forming the second and third lightly doped drain (LDD) structures comprises ion implantation using a same mask.

6. A meted as defined in claim 4 , wherein the second portion of the high-voltage device region is at an edge of the high-voltage device region.

7. A method as defined in claim 4 , wherein a low-voltage device is formed in the low-voltage device region.

8. A method as defined in claim 7 , wherein the low-voltage device has a breakdown voltage of approximately 5-7 V.

9. A method as defined in claim 4 , wherein a high-voltage device is formed in the first portion of the high-voltage device region.

10. A method as defined in claim 9 , wherein the high-voltage device has a breakdown voltage of approximately 8-10 V.

11. A method as defined in claim 9 , wherein the electrostatic discharge protecting device has higher second breakdown current than the high-voltage device.

12. A method as defined in claim 1 , wherein a low-voltage device is formed in the low-voltage device region.

13. A method as defined in claim 12 , wherein a high-voltage device is formed in the high-voltage device region.

14. A method as defined in claim 13 , wherein an electrostatic discharge protecting device is formed in the second portion of the high-voltage device region.

15. A method as defined in claim 14 , wherein the electrostatic discharge protecting device has higher second breakdown current than the high-voltage device.

16. A method as defined in claim 15 , wherein the high-voltage device has a breakdown voltage of approximately 8-10 V.

17. A method as defined in claim 16 , wherein the low-voltage device has a breakdown voltage of approximately 5-7 V.