IP Library Patent Application 11270431
Patent Application
App. No. 11/270,431

Flip chip bonding structure using non-conductive adhesive and related fabrication method

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Quick Facts
Patent No.
US None
App. No.
11/270,431
Abstract

A flip chip bonding structure has a non-conductive adhesive interposed between an integrated circuit (IC) chip and a circuit substrate. The IC chip has I/O pads on an active surface thereof, and the circuit substrate has bump pads on a first surface thereof. The non-conductive adhesive is provided on the active surface of the chip or alternatively on the first surface of the substrate, exposing the I/O pads or the bump pads respectively. Conductive bumps such as metal bumps are formed on the I/O pads and then bonded to the bump pads. With no adhesive between the metal bumps and the bump pads, non-conductive particles in the adhesive do not obstruct mechanical and electrical connections therebetween. The particle content of the non-conductive adhesive can be increased and flip chip bonding structures can be formed in a wafer level process.

Claims (88)

1 . A flip chip bonding structure comprising:

an integrated circuit chip having a plurality of input/output pads arranged on an active surface thereof;

a circuit substrate having a plurality of bump pads arranged on a first surface thereof;

a non-conductive adhesive provided on the active surface of the IC chip and exposing the input/output pads of the integrated circuit chip; and

a plurality of metal bumps formed on the input/output pads of the IC chip and bonded to corresponding ones of the plurality of bump pads.

2 . The structure of claim 1 , wherein the non-conductive adhesive is in the form of a form of film or curable adhesive.

3 . The structure of claim 1 , wherein the non-conductive adhesive includes resin and non-conductive particles mixed therein.

4 . The structure of claim 3 , wherein the resin of the non-conductive adhesive is made of at least one of an epoxy and a silicone.

5 . The structure of claim 3 , wherein the non-conductive particles of the non-conductive adhesive are made of at least one of a silicon dioxide (SiO 2 ) and a silicon carbide (SiC).

6 . The structure of claim 1 , wherein the circuit substrate further comprises a solder mask covering the first surface and exposing the bump pads.

7 . The structure of claim 6 , wherein the solder mask includes windows, each of the windows exposing one of the bump pads.

8 . The structure of claim 6 , wherein the solder mask includes windows, each of the windows exposing at least two of the bump pads.

9 . The structure of claim 1 , wherein the circuit substrate further includes a plurality of ball pads arranged on a second surface opposite to the first surface.

10 . The structure of claim 9 , further comprising:

a plurality of solder balls each formed on one of the plurality of ball pads.

11 . A flip chip bonding structure comprising:

an integrated circuit chip having a plurality of input/output pads arranged on an active surface thereof;

a circuit substrate having a plurality of bump pads arranged on a first surface thereof;

a non-conductive adhesive provided on the first surface of the circuit substrate and exposing the bump pads of the circuit substrate; and

a plurality of metal bumps formed on the input/output pads of the integrated circuit chip and bonded to the corresponding bump pads of the circuit substrate.

12 . The structure of claim 11 , wherein the non-conductive adhesive is in the form of film or curable adhesive.

13 . The structure of claim 11 , wherein the non-conductive adhesive includes resin and non-conductive particles mixed together.

14 . The structure of claim 13 , wherein the resin of the non-conductive adhesive comprises at least one of epoxy and silicone.

15 . The structure of claim 13 , wherein the non-conductive particles of the non-conductive adhesive comprise at least one of silicon dioxide (SiO 2 ) and silicon carbide (SiC).

16 . The structure of claim 11 , wherein the circuit substrate further includes a plurality of ball pads arranged on a second surface thereof opposite to the first surface.

17 . The structure of claim 16 , further comprising:

a plurality of solder balls each formed on a corresponding ball pad of the circuit substrate.

18 . A method of fabricating a flip chip bonding structure, the method comprising:

providing an integrated circuit chip having a plurality of input/output pads arranged on an active surface thereof;

providing a non-conductive adhesive on the active surface of the integrated circuit chip;

removing a portion of the non-conductive adhesive to expose the input/output pads of the integrated circuit chip;

forming a plurality of conductive bumps on the input/output pads of the integrated circuit chip;

providing a circuit substrate having a plurality of bump pads arranged on a first surface thereof and corresponding to the plurality of bump pads; and

bonding the conductive bumps to the corresponding bump pads of the circuit substrate.

19 . The method of claim 18 , wherein the step of providing the integrated circuit chip includes providing a wafer comprising a plurality of integrated chips.

20 . The method of claim 19 , further comprising:

sawing the wafer to separate the plurality of integrated circuit chips after the bonding of the conductive bumps.

21 . The method of claim 19 , further comprising:

sawing the wafer to separate the plurality of integrated circuit chips before the bonding of the conductive bumps.

22 . The method of claim 18 , wherein a height of the conductive bumps is greater than a thickness of the non-conductive adhesive.

23 . The method of claim 18 , wherein providing the circuit substrate includes forming a solder mask to cover the first surface and forming windows in the solder mask to expose the bump pads.

24 . The method of claim 23 , wherein bonding the conductive bumps includes inserting the conductive bumps into the windows of the solder mask.

25 . A method of fabricating a flip chip bonding structure, the method comprising:

providing an integrated circuit chip having a plurality of input/output pads arranged on an active surface thereof;

forming a plurality of conductive bumps on the input/output pads of the integrated circuit chip;

providing a circuit substrate having a plurality of bump pads arranged on a first surface thereof;

providing a non-conductive adhesive on the first surface of the circuit substrate, the non-conductive adhesive exposing the bump pads; and

bonding the conductive bumps to corresponding bump pads of the circuit substrate.

26 . The method of claim 25 , wherein the step of providing the integrated circuit chip includes providing a wafer having a plurality of integrated circuit chips.

27 . The method of claim 26 , further comprising:

sawing the wafer to separate the plurality of integrated circuit chips after bonding of the conductive bumps.

28 . The method of claim 26 , further comprising:

sawing the wafer to separate the plurality of integrated circuit chips before the bonding of the conductive bumps.

29 . A method of fabricating a flip chip bonding structure, the method comprising:

providing an integrated circuit chip having on an active side thereof a plurality of chip pads arranged according to a given pattern;

providing a circuit substrate having on one side thereof a plurality of substrate pads arranged according to the given pattern to correspond with the chip pads;

providing a non-conductive adhesive having therethrough a plurality of apertures arranged according to the given pattern to correspond to the chip pads and to the substrate pads;

arranging the active surface of the integrated circuit in face-to-face relation with the one side of the circuit substrate and with the non-conductive adhesive therebetween whereby selected chip pads lie face-to-face with corresponding substrate pads through a corresponding aperture; and

electrically coupling the selected chip pads and the corresponding substrate pads.

30 . A method according to claim 29 , wherein electrically coupling includes interposing between corresponding chip pads and substrate pads electrically conductive bumps.

31 . A method according to claim 30 , wherein the bumps are first bonded to the chip pads and thereafter inserted into corresponding apertures.

32 . A method according to claim 30 , wherein the bumps are first bonded to the substrate pads and thereafter inserted into corresponding apertures.

33 . A method according to claim 30 , wherein a height of the bumps is greater than a thickness of the non-conductive adhesive.

34 . A method according to claim 29 , wherein providing a non-conductive adhesive includes etching to form the plurality of apertures.

35 . A method according to claim 34 , wherein the method further includes first attaching the non-conductive adhesive to the integrated circuit chip and thereafter forming the apertures.

36 . A method according to claim 34 , wherein the method further includes first attaching the non-conductive adhesive to the circuit substrate and thereafter forming the apertures.

37 . A method according to claim 29 , wherein the integrated circuit chip is one of a plurality of chips forming a wafer and the circuit substrate is one of a corresponding plurality of circuit substrates forming a substrate matrix.

38 . A method according to claim 37 , wherein the wafer and the matrix are arranged in face-to-face relation with the non-conductive adhesive therebetween.

39 . A method according to claim 38 , wherein the bumps are attached to one of the wafer and the matrix and thereafter inserted into corresponding apertures to electrically couple the chip pads with corresponding substrate pads.

40 . A method according to claim 37 , further comprising:

bonding conductive bumps to the chip pads; and

sawing the wafer to separate the plurality of integrated circuit chips after the bonding of the conductive bumps thereto.

41 . A method according to claim 37 , further comprising:

bonding conductive bumps to the substrate pads; and

sawing the matrix to separate the plurality of circuit substrates before the bonding of the conductive bumps thereto.

42 . A method according to claim 29 , wherein providing the circuit substrate includes forming a solder mask to cover the first surface and forming windows in the solder mask to expose the substrate pads.

43 . A method according to claim 42 , further comprising:

bonding conductive bumps to one of the plurality of chip pads and the plurality of substrate pads; and

inserting the conductive bumps into the windows of the solder mask.

44 . In flip chip bonding structure manufacture, the flip chip bonding structure including an integrated chip having an active surface in face-to-face relation with a circuit substrate and having a non-conductive adhesive and a plurality of conductive bumps interposed between the integrated circuit chip and the circuit substrate, the active surface having a plurality of chip pads, the circuit substrate having a corresponding plurality of substrate pads positioned to contact corresponding bumps therebetween, an improvement comprising:

bonding the plurality bumps to selected ones of the plurality of chip pads and the plurality of substrate pads;

providing a plurality of apertures in the non-conductive adhesive, the apertures corresponding to the plurality of chip pads and to the plurality of substrate pads; and

inserting the bumps into corresponding ones of the apertures to electrically couple ones of the plurality of chip pads with corresponding ones of the plurality of substrate pads.

45 . A flip chip bonding structure in assembly comprising:

an integrated circuit chip having a plurality of chip pads on an active surface thereof;

a circuit substrate having a plurality of substrate pads on a first surface thereof;

a plurality of bumps; and

a non-conductive adhesive having a plurality of apertures therethrough, the plurality of chip pads, the plurality of substrate pads, the plurality of bumps, and the plurality of apertures corresponding according to a given pattern, each bump being interposed between corresponding chip pads and substrate pads and positioned to enter a corresponding aperture to electrically couple chip pads with corresponding substrate pads.

Assignments (2)
SECURITY INTEREST Recorded Aug 1, 2025
From: EAT JUST, INC.; GOOD MEAT, INC.
To: AHIMSA FOUNDATION, AS COLLATERAL AGENT
Reel/Frame 072317/0826 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 20, 2005
From: YOUN, HAN-SHIN
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 016925/0185 →