IP Library Granted Patent US 7,473,966
Granted Patent B1
US 7,473,966 · App. 11/272,477 · Granted Jan 6, 2009

Oxide-bypassed lateral high voltage structures and methods

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Quick Facts
Patent No.
US 7,473,966
App. No.
11/272,477
Granted
Jan 6, 2009
Kind
B1
Abstract

A lateral high-voltage active device structure, in which field-shaping trench electrodes are capacitively coupled to the voltage-withstand region near the source end thereof.

Claims (25)

1. A lateral semiconductor device, comprising:

a carrier-emission structure;

a voltage-withstand structure, through which carriers are emitted by said carrier-emission structure can pass laterally; and

trench electrodes which are capacitively coupled to sidewalls of said voltage-withstand structure to provide electric field shaping therein, wherein the voltage-withstand structure exhibits a lateral taper adjacent to a tapered drift region, said drift region narrower near a drain compared to wider nearer a source.

2. A lateral semiconductor device, comprising:

a carrier-emission structure, which can emit charge carriers of a first type;

a voltage-withstand structure, through which carriers emitted by said carrier-emission structure can pass laterally, adjacent to a laterally tapered dielectric structure;

a carrier-collection structure, which receives charge carriers of said first type which have passed through said voltage-withstand structure; and

trench electrodes which adjoin opposite sides of said voltage-withstand structure, and which have tapered sidewalls adjoining the tapered dielectric structure, said trench electrodes capacitively coupled to provide electric field shaping in said voltage-withstand structure.

3. A lateral semiconductor device, comprising:

a carrier-emission structure; and

a voltage-withstand structure which is extended parallel to the surface of a monolithic semiconductor mass, and positioned so that carriers emitted by said carrier-emission structure pass laterally through said voltage-withstand structure, including a laterally tapered dielectric structure narrower near the drain end; and

trench electrodes which are also extended parallel to said surface, and which adjoin opposite sides of said voltage-withstand structure near said carrier-emission structure.

4. The device of claim 1 , wherein said carrier-emission structure includes a source diffusion, and said trench electrodes are electrically connected to said source region.

5. The device of claim 1 , wherein said carrier-emission structure includes an anode and a semiconductor diffusion abutting said anode.

6. The device of claim 1 , wherein said carrier-emission structure includes a source diffusion, a semiconductor channel which abuts said source diffusion, and a gate which is capacitively coupled to said channel.

7. The device of claim 1 , wherein said carrier-emission structure includes an emitter diffusion, and a base diffusion which has a conductivity type opposite to that of said emitter diffusion and said voltage-withstand region.

8. The device of claim 1 , further comprising an electrical contact which receives carriers emitted by said carrier-emission structure, after said carriers have passed through said voltage-withstand region.

9. The device of claim 2 , wherein said carrier-emission structure includes a source diffusion, a semiconductor channel which abuts said source diffusion, and a gate which is capacitively coupled to said channel.

10. The device of claim 2 , wherein said carrier-collection structure also emits charge carriers of a second type, which can pass through said voltage-withstand region to said carrier-emission structure.

11. The device of claim 2 , wherein said carrier-collection structure consists of a diffusion which has a conductivity type opposite to that of said voltage-withstand region.

12. The device of claim 2 , wherein said carrier-emission structure includes a source diffusion, and said trench electrodes are electrically connected to said source region.

13. The device of claim 3 , wherein said carrier-emission structure includes a source diffusion, a semiconductor channel which abuts said source diffusion, and a gate which is capacitively coupled to said channel.

14. The device of claim 3 , further comprising an electrical contact which receives carriers emitted by said carrier-emission structure, after said carriers have passed through said voltage-withstand region.

15. The device of claim 3 , wherein said carrier-emission structure includes a source diffusion, and said trench electrodes are electrically connected to said source region.

Assignments (2)
SECURITY INTEREST Recorded Dec 27, 2022
From: MAXPOWER SEMICONDUCTOR, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 062228/0648 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 16, 2013
From: BLANCHARD, RICHARD A.
To: MAXPOWER SEMICONDUCTOR, INC.
Reel/Frame 030224/0313 →