Integrated circuit design using modified cells
An exemplary method for modifying at least part of an integrated circuit layout comprises obtaining an integrated circuit device layout, the integrated circuit device being designed using a library of cells, obtaining a modified library of cells, and replacing at least one cell in the integrated circuit device layout with a corresponding modified cell of the modified library to obtain a modified integrated circuit device layout. The modified library includes modified cells corresponding to cells in the library and candidate areas of each modified cell indicating portions of the cell for further processing. At least some of the modified cells have been modified to at least partially compensate for a manufacturing effect.
1. A method for designing an integrated circuit using a library of cells, wherein at least one of said cells is modified by a process carried out by instructions stored in or on a computer-readable storage medium executed by a processor, comprising the steps of:
(a) obtaining at least one parameter related to a given cell having at least one feature;
(b) determining an uncertain region based on said parameter, said uncertain region being an area near said given cell where at least one feature from at least one neighboring cell, if located within said uncertain region, affects implementation of said at least one feature of said given cell;
(c) determining a plurality of computer-generated features at least partially within said uncertain region to determine one or more candidate areas indicating portions of said given cell for further processing, comprising:
selecting a plurality of control points of said given cell;
determining a performance metric value at each control point;
comparing said performance metric values to tolerances of said given cell;
determining invalid control points based on said comparing; and
mapping said invalid control points to candidate areas on said given cell; and
(d) outputting said given cell and said candidate areas to produce a modified cell.
2. The method of claim 1 , further comprising, prior to said step (c), processing said given cell to compensate for a manufacturing effect.
3. The method of claim 2 , wherein said compensate includes correcting a distortion.
4. The method of claim 2 , further comprising, prior to step (c), the step of applying a nominal set of computer-generated features near said given cell to determine any proximity effects on said given cell caused by said nominal set of computer-generated features.
5. The method of claim 1 , wherein said determine one or more candidate areas includes:
determining a plurality of distributions of performance metric values at control points of said given cell;
comparing said distributions to tolerances of said given cell;
determining invalid control points based on said comparing; and
mapping said invalid control points to candidate areas on said given cell.
6. A system for designing an integrated circuit using a library of cells, wherein at least one of said cells is modified by instructions stored in or on a computer-readable storage medium executed by a processor, the instructions comprising:
(a) instructions to obtain at least one parameter related to a given cell having at least one feature;
(b) instructions to determine an uncertain region based on said parameter, said uncertain region being an area near said given cell where at least one feature from at least one neighboring cell, if located within said uncertain region, affects implementation of said at least one feature of said given cell;
(c) instructions to determine a plurality of computer-generated features at least partially within said uncertain region to determine one or more candidate areas indicating portions of said given cell for further processing, comprising:
instructions to select a plurality of control points of said given cell;
instructions to determine a performance metric value at each control point;
instructions to compare said performance metric values to tolerances of said given cell;
instructions to determine invalid control points based on said comparing; and
instructions to map said invalid control points to candidate areas on said given cell; and
(d) instructions to output said given cell and said candidate areas to produce a modified cell.
7. The system of claim 6 , further comprising instructions to process said given cell to compensate for a manufacturing effect.
8. The system of claim 7 , wherein said compensate includes correcting a distortion.
9. The system of claim 7 , further comprising instructions to apply a nominal set of computer-generated features near said given cell to determine any proximity effects on said given cell caused by said nominal set of computer-generated features.
10. The system of claim 6 , wherein said instructions to determine one or more candidate areas comprise:
instructions to determine a plurality of distributions of performance metric values at control points of said given cell;
instructions to compare said distributions to tolerances of said given cell;
instructions to determine invalid control points based on said comparing; and
instructions to map said invalid control points to candidate areas on said given cell.