Insulating substrate and semiconductor device having a thermally sprayed circuit pattern

1. An insulating substrate comprising:

a metal base;

an insulating layer on the metal base, the insulating layer comprising a room temperature shock solidification film; and

a circuit pattern on the insulating layer, the circuit pattern comprising a thermal spray coating.

2. The insulating substrate according to claim 1 , wherein the insulating layer is a ceramic layer of a room temperature shock solidification film which is joined to the metal base by ceramic fine particles that have collided with the metal base, the ceramic fine particles comprising at least one of silicon oxide, aluminum oxide, silicon nitride, boron nitride, and aluminum nitride.

3. The insulating substrate according to claim 2 , wherein the ceramic fine particles have a diameter of from 5 nm to 1 μm.

4. The insulating substrate according to claim 2 , wherein the insulating layer comprises at least one of a first group consisting of silicon oxide and aluminum oxide, and at least one of a second group consisting of silicon nitride, boron nitride, and aluminum nitride.

5. The insulating substrate according to claim 1 , wherein the insulating layer comprises a ceramic room temperature shock solidification film layer that is joined to the metal base by ceramic fine particles that have collided with the metal base, the ceramic fine particles comprising at least one of silicon nitride, boron nitride, and aluminum nitride, with surfaces of the least one of silicon nitride, boron nitride, and aluminum nitride comprising a coating of aluminum oxide.

6. The insulating substrate according to claim 1 , wherein the insulating layer comprises a ceramic room temperature shock solidification film layer that is joined to the metal base by ceramic fine particles that have collided with the metal base, the ceramic fine particles comprising of at least one of silicon nitride, boron nitride, and aluminum nitride, with surfaces of the at least one of silicon nitride, boron nitride, and aluminum nitride comprising a coating of silicon oxide.

7. The insulating substrate according to claim 1 , wherein the circuit pattern is a metal thermal spray coating comprising one of copper, aluminum, nickel, iron, titanium, and molybdenum, or an alloy thereof.

8. The insulating substrate according to claim 1 , wherein the insulating layer is an aerosol deposited room temperature shock solidification film.

9. The insulating substrate according to claim 1 , wherein the circuit pattern is a cold sprayed thermal spray coating.

10. The insulating substrate according to claim 1 , wherein the thickness of the insulating layer is from 30 to 400 μm.

11. A semiconductor device comprising:

said insulating substrate according to claim 1

a resin case adhered to the metal base;

a power device mounted on the circuit pattern and placed inside the resin case; and

an insulating resin filled in the resin case so as to seal in and isolate from the surroundings the insulating layer and the circuit pattern.

12. A semiconductor device comprising:

said insulating substrate according to claim 1

a power device mounted on the circuit pattern; and

a thermosetting insulating resin formed so as to expose part of the metal base to the surroundings, and to seal in and isolate from the surroundings the insulating layer and the circuit pattern.

13. An insulating substrate comprising:

a metal base;

room temperature shock solidification insulating film means on the metal base; and

thermal spray coating means defining a circuit pattern on the room temperature shock solidification insulating film.

14. A method of forming insulating substrate comprising:

providing a metal base;

forming a room temperature shock solidification insulating film on the metal base; and

thermal spray coating a circuit pattern on the room temperature shock solidification insulating film.